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Complementary Metal–Oxide–Semiconductor Compatible 2D Layered Film‐Based Gas Sensors by Floating‐Gate Coupling Effect

Advanced functional materials, 2022-03, Vol.32 (13), p.n/a

2022

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High-Density Embedded 3-D Stackable Via RRAM in 16-nm FinFET CMOS Logic Process

IEEE transactions on electron devices, 2024-06, Vol.71 (6), p.3614-3619

2024

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On-Wafer FinFET-Based 3-D E-Beam Detector Cube for In Situ Monitoring of Advanced Lithography Processes Beyond 5 nm

IEEE transactions on electron devices, 2024-06, Vol.71 (6), p.3739-3745

2024

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CMOS-Compatible Embedded Artificial Synaptic Device (eASD) for Neuromorphic Computing and AI Applications

IEEE transactions on electron devices, 2024-02, Vol.71 (2), p.1-7

2024

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A New High Density 3D Stackable Via RRAM for Computing-in-Memory SOC Applications

IEEE transactions on electron devices, 2024-04, Vol.71 (4), p.1-5

2024

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Memory-Logic Hybrid Gate With 3-D Stackable Complementary Latches

IEEE transactions on electron devices, 2020-08, Vol.67 (8), p.3109-3114

2020

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4K Detectors Array for On-Wafer EUV Imaging in Lithography Control Beyond 5-nm Node

IEEE transactions on electron devices, 2023-11, Vol.70 (11), p.5713-5719

2023

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3-D Stackable Offset-Via Antifuse by Cu BEOL Process in Advanced CMOS Technologies

IEEE transactions on electron devices, 2023-12, Vol.70 (12), p.6273-6278

2023

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Multilevel Fully Logic-Compatible Latch Array for Computing-in-Memory

IEEE transactions on electron devices, 2023-04, Vol.70 (4), p.1-8

2023

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Self-Convergent Trimming SRAM True Random Number Generation With In-Cell Storage

IEEE journal of solid-state circuits, 2019-09, Vol.54 (9), p.2614-2621

2019

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Multifunctional Ion‐Sensitive Floating Gate Fin Field‐Effect Transistor with Three‐Dimensional Nanoseaweed Structure by Glancing Angle Deposition Technology

Small (Weinheim an der Bergstrasse, Germany), 2022-02, Vol.18 (5), p.e2104168-n/a

2022

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Embedded Micro-detectors for EUV Exposure Control in FinFET CMOS Technology

Nanoscale research letters, 2022-01, Vol.17 (1), p.5-5, Article 5

2022

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Via Diode in Cu Backend Process for 3D Cross-Point RRAM Arrays

IEEE journal of the Electron Devices Society, 2014-11, Vol.2 (6), p.149-153

2014

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Detectors Array for In Situ Electron Beam Imaging by 16-nm FinFET CMOS Technology

Nanoscale research letters, 2021-05, Vol.16 (1), p.93-93, Article 93

2021

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Battery-Less Electronic Layer Detectors Array (ELDA) for In-Tool DUV Detection by FinFET CMOS Technology

IEEE transactions on electron devices, 2021-10, Vol.68 (10), p.4972-4976

2021

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Advanced self-convergent calibration for selenized two-dimensional film gas sensors

Japanese Journal of Applied Physics, 2024-02, Vol.63 (2), p.2

2024

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Dynamic pH Sensor with Embedded Calibration Scheme by Advanced CMOS FinFET Technology

Sensors (Basel, Switzerland), 2019-04, Vol.19 (7), p.1585

2019

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High Density Embedded 3D Stackable Via RRAM in Advanced MCU Applications

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023, p.1-2

2023

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Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme

IEEE journal of solid-state circuits, 2014-04, Vol.49 (4), p.908-916

2014

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28-nm 2T High- K Metal Gate Embedded RRAM With Fully Compatible CMOS Logic Processes

IEEE electron device letters, 2013-10, Vol.34 (10), p.1253-1255

2013

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Gate contact resistive random access memory in nano scaled FinFET logic technologies

Japanese Journal of Applied Physics, 2017-04, Vol.56 (4S), p.4-04CE05

2017

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A New 2T Contact Coupling Gate MTP Memory in Fully CMOS Compatible Process

IEEE transactions on electron devices, 2012-07, Vol.59 (7), p.1899-1905

2012

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New High-Density Differential Split Gate Flash Memory With Self-Boosting Function

IEEE electron device letters, 2013-09, Vol.34 (9), p.1127-1129

2013

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A Nitride-Based P-Channel Logic-Compatible One-Time-Programmable Cell With a New Contact Select Gate

IEEE electron device letters, 2009-10, Vol.30 (10), p.1090-1092

2009

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On-Wafer Electronic Layer Detectors Array (ELDA) for e-beam Imaging in Advanced Lithographic Systems

2021 International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA), 2021, p.1-2

2021

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Complementary Metal–Oxide–Semiconductor Compatible 2D Layered Film‐Based Gas Sensors by Floating‐Gate Coupling Effect

High-Density Embedded 3-D Stackable Via RRAM in 16-nm FinFET CMOS Logic Process

On-Wafer FinFET-Based 3-D E-Beam Detector Cube for In Situ Monitoring of Advanced Lithography Processes Beyond 5 nm

CMOS-Compatible Embedded Artificial Synaptic Device (eASD) for Neuromorphic Computing and AI Applications

A New High Density 3D Stackable Via RRAM for Computing-in-Memory SOC Applications

Memory-Logic Hybrid Gate With 3-D Stackable Complementary Latches

4K Detectors Array for On-Wafer EUV Imaging in Lithography Control Beyond 5-nm Node

3-D Stackable Offset-Via Antifuse by Cu BEOL Process in Advanced CMOS Technologies

Multilevel Fully Logic-Compatible Latch Array for Computing-in-Memory

Self-Convergent Trimming SRAM True Random Number Generation With In-Cell Storage

Multifunctional Ion‐Sensitive Floating Gate Fin Field‐Effect Transistor with Three‐Dimensional Nanoseaweed Structure by Glancing Angle Deposition Technology

Embedded Micro-detectors for EUV Exposure Control in FinFET CMOS Technology

Via Diode in Cu Backend Process for 3D Cross-Point RRAM Arrays

Detectors Array for In Situ Electron Beam Imaging by 16-nm FinFET CMOS Technology

Battery-Less Electronic Layer Detectors Array (ELDA) for In-Tool DUV Detection by FinFET CMOS Technology

Advanced self-convergent calibration for selenized two-dimensional film gas sensors

Dynamic pH Sensor with Embedded Calibration Scheme by Advanced CMOS FinFET Technology

High Density Embedded 3D Stackable Via RRAM in Advanced MCU Applications

Area-Efficient Embedded Resistive RAM (ReRAM) Macros Using Logic-Process Vertical-Parasitic-BJT (VPBJT) Switches and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme

28-nm 2T High- K Metal Gate Embedded RRAM With Fully Compatible CMOS Logic Processes

Gate contact resistive random access memory in nano scaled FinFET logic technologies

A New 2T Contact Coupling Gate MTP Memory in Fully CMOS Compatible Process

New High-Density Differential Split Gate Flash Memory With Self-Boosting Function

A Nitride-Based P-Channel Logic-Compatible One-Time-Programmable Cell With a New Contact Select Gate

On-Wafer Electronic Layer Detectors Array (ELDA) for e-beam Imaging in Advanced Lithographic Systems

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