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Single-Event Effect Characterization of 16 GHz Phase-Locked Loop in Sub-20 nm FinFET Technology

IEEE transactions on nuclear science, 2024-09, Vol.71 (9), p.2077-2085

2024

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Soft Error Tolerant Bandgap Reference Utilizing Single-Event Transient Filtering Technique

IEEE transactions on nuclear science, 2024-04, Vol.71 (4), p.1-1

2024

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Research on Single Event Transients in Linear Voltage Regulators in a 28 nm Bulk CMOS Technology

IEEE transactions on nuclear science, 2024-04, Vol.71 (4), p.793-801

2024

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ASET and TID Characterization of a Radiation Hardened Bandgap Voltage Reference in a 28-nm Bulk CMOS Technology

IEEE transactions on nuclear science, 2022-05, Vol.69 (5), p.1141-1147

2022

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Radiation Effects of Advanced Electronic Devices and Circuits

Electronics (Basel), 2024-03, Vol.13 (6), p.1073

2024

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Effect of Cell Placement on Single-Event Transient Pulse in a Bulk FinFET Technology

IEEE transactions on nuclear science, 2021-05, Vol.68 (5), p.1103-1110

2021

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Higher NMOS single event transient susceptibility compared to PMOS in sub-20nm bulk FinFET

IEEE electron device letters, 2023-10, Vol.44 (10), p.1-1

2023

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A Body-Biasing Technique for Single-Event Transient Mitigation in 28-nm Bulk CMOS Process

IEEE transactions on nuclear science, 2021-12, Vol.68 (12), p.2717-2723

2021

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On-Chip Relative Single-Event Transient/Single- Event Upset Susceptibility Test Circuit for Integrated Circuits Working in Real Time

IEEE transactions on nuclear science, 2018-01, Vol.65 (1), p.376-381

2018

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Design, Application, and Verification of the Novel SEU Tolerant Abacus-Type Layouts

Electronics (Basel), 2021-12, Vol.10 (23), p.3017

2021

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Gate breakdown induced stuck bits in sub-20 nm FinFET SRAM

Applied physics letters, 2024-07, Vol.125 (2)

2024

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Machine Learning-Based Soft-Error-Rate Evaluation for Large-Scale Integrated Circuits

Electronics (Basel), 2023-12, Vol.12 (24), p.4978

2023

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Heavy-Ion-Induced Charge Sharing Measurement With a Novel Uniform Vertical Inverter Chains (UniVIC) SEMT Test Structure

IEEE transactions on nuclear science, 2015-12, Vol.62 (6), p.3330-3338

2015

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A SET-Tolerant High-Frequency Multibiased Multiphase Voltage-Controlled Oscillator for Phase Interpolator-Based Clock and Data Recovery

IEEE transactions on nuclear science, 2022-07, Vol.69 (7), p.1725-1732

2022

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SEU Tolerance Efficiency of Multiple Layout-Hardened 28 nm DICE D Flip-Flops

Electronics (Basel), 2022-04, Vol.11 (7), p.972

2022

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Influence of Oxygen Vacancy Density on the Polaronic Configuration in Rutile

Materials, 2018-11, Vol.11 (11), p.2156

2018

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TAISAM: A Transistor Array-Based Test Method for Characterizing Heavy Ion-Induced Sensitive Areas in Semiconductor Materials

Electronics (Basel), 2022-07, Vol.11 (13), p.2043

2022

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Experimental characterization of the dominant multiple nodes charge collection mechanism in metal oxide-semiconductor transistors

Applied physics letters, 2017-06, Vol.110 (23)

2017

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Characterization of Single-Event Transient Pulse Quenching among Dummy Gate Isolated Logic Nodes in 65 nm Twin-Well and Triple-Well CMOS Technologies

IEEE transactions on nuclear science, 2015-10, Vol.62 (5), p.2302-2309

2015

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Characterization of Single-Event Transient Pulse Broadening Effect in 65 nm Bulk Inverter Chains Using Heavy Ion Microbeam

IEEE transactions on nuclear science, 2017-01, Vol.64 (1), p.119-124

2017

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Dependence of the vortex formation process on the perpendicular magnetic anisotropy constant in perpendicular magnetic tunnel junctions

Japanese Journal of Applied Physics, 2019-01, Vol.58 (1), p.10911

2019

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Investigation of Heavy-Ion Induced Single-Event Transient in 28 nm Bulk Inverter Chain

Symmetry (Basel), 2020-04, Vol.12 (4), p.624

2020

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A system-level method for hardening phase-locked loop to single-event effects

Materials research express, 2022-09, Vol.9 (9), p.96301

2022

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An SEU/SET-Tolerant Phase Frequency Detector With Double-Loop Self-Sampling Technology for Clock Data Recovery

IEEE transactions on nuclear science, 2019-07, Vol.66 (7), p.1483-1490

2019

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Current mirror with charge dissipation transistor for analogue single‐event transient mitigation in space application

IET circuits, devices & systems, 2021-03, Vol.15 (2), p.136-140

2021

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Single-Event Effect Characterization of 16 GHz Phase-Locked Loop in Sub-20 nm FinFET Technology

Soft Error Tolerant Bandgap Reference Utilizing Single-Event Transient Filtering Technique

Research on Single Event Transients in Linear Voltage Regulators in a 28 nm Bulk CMOS Technology

ASET and TID Characterization of a Radiation Hardened Bandgap Voltage Reference in a 28-nm Bulk CMOS Technology

Radiation Effects of Advanced Electronic Devices and Circuits

Effect of Cell Placement on Single-Event Transient Pulse in a Bulk FinFET Technology

Higher NMOS single event transient susceptibility compared to PMOS in sub-20nm bulk FinFET

A Body-Biasing Technique for Single-Event Transient Mitigation in 28-nm Bulk CMOS Process

On-Chip Relative Single-Event Transient/Single- Event Upset Susceptibility Test Circuit for Integrated Circuits Working in Real Time

Design, Application, and Verification of the Novel SEU Tolerant Abacus-Type Layouts

Gate breakdown induced stuck bits in sub-20 nm FinFET SRAM

Machine Learning-Based Soft-Error-Rate Evaluation for Large-Scale Integrated Circuits

Heavy-Ion-Induced Charge Sharing Measurement With a Novel Uniform Vertical Inverter Chains (UniVIC) SEMT Test Structure

A SET-Tolerant High-Frequency Multibiased Multiphase Voltage-Controlled Oscillator for Phase Interpolator-Based Clock and Data Recovery

SEU Tolerance Efficiency of Multiple Layout-Hardened 28 nm DICE D Flip-Flops

Influence of Oxygen Vacancy Density on the Polaronic Configuration in Rutile

TAISAM: A Transistor Array-Based Test Method for Characterizing Heavy Ion-Induced Sensitive Areas in Semiconductor Materials

Experimental characterization of the dominant multiple nodes charge collection mechanism in metal oxide-semiconductor transistors

Characterization of Single-Event Transient Pulse Quenching among Dummy Gate Isolated Logic Nodes in 65 nm Twin-Well and Triple-Well CMOS Technologies

Characterization of Single-Event Transient Pulse Broadening Effect in 65 nm Bulk Inverter Chains Using Heavy Ion Microbeam

Dependence of the vortex formation process on the perpendicular magnetic anisotropy constant in perpendicular magnetic tunnel junctions

Investigation of Heavy-Ion Induced Single-Event Transient in 28 nm Bulk Inverter Chain

A system-level method for hardening phase-locked loop to single-event effects

An SEU/SET-Tolerant Phase Frequency Detector With Double-Loop Self-Sampling Technology for Clock Data Recovery

Current mirror with charge dissipation transistor for analogue single‐event transient mitigation in space application

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