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Voltage-controlled multiple-valued logic design using negative differential resistance devices

Solid-state electronics, 2010-12, Vol.54 (12), p.1637-1640

2010

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Design and fabrication of multiple-valued multiplexer using negative differential resistance circuits and standard SiGe process

Solid-state electronics, 2008-06, Vol.52 (6), p.882-885

2008

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Standard BiCMOS Implementation of a Two-Peak Negative Differential Resistance Circuit with High and Adjustable Peak-to-Valley Current Ratio

IEICE transactions on electronics, 2009, Vol.E92-C (5), p.635-638

2009

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Trivalued Memory Circuit Using Metal–Oxide–Semiconductor Field-Effect Transistor Bipolar-Junction-Transistor Negative-Differential-Resistance Circuits Fabricated by Standard SiGe Process

Japanese Journal of Applied Physics, 2006-09, Vol.45 (9L), p.L977

2006

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Multiple-input logic circuit design using BiCMOS-based negative differential resistance circuits

Analog integrated circuits and signal processing, 2012-10, Vol.73 (1), p.409-414

2012

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Design and characterization of the negative differential resistance circuits using the CMOS and BiCMOS process

Analog integrated circuits and signal processing, 2010, Vol.62 (1), p.63-68

2010

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Design of monostable–bistable transition logic element using the BiCMOS-based negative differential resistance circuit

Analog integrated circuits and signal processing, 2011-09, Vol.68 (3), p.379-385

2011

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Novel multiple-selected and multiple-valued memory design using negative differential resistance circuits suitable for standard SiGe-based BiCMOS process

Analog integrated circuits and signal processing, 2009-05, Vol.59 (2), p.161-167

2009

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Frequency divider design using the combination of transistors and passive devices

Analog integrated circuits and signal processing, 2012, Vol.70 (1), p.141-145

2012

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Multiple-input NOR logic design using negative differential resistance circuits implemented by standard SiGe process

Solid-state electronics, 2008-02, Vol.52 (2), p.175-178

2008

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Design and application of Van Der Pol oscillator using NDR circuit

2013 International Symposium on Next-Generation Electronics, 2013, p.329-332

2013

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Design of NDR-Based Multiple-Valued Multiplexer Using Standard SiGe Process

2007 IEEE Conference on Electron Devices and Solid-State Circuits, 2007, p.925-928

2007

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A VHF Oscillator Design Based on BJT Active Load Differential Amplifier

2007 IEEE Conference on Electron Devices and Solid-State Circuits, 2007, p.917-920

2007

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Logic circuit design using monostable–bistable transition logic element based on standard BiCMOS process

Microelectronics, 2011-02, Vol.42 (2), p.477-482

2011

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Design of AND and NAND Logic Gate Using NDR-BASED Circuit Suitable for CMOS Process

APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems, 2006, p.1325-1328

2006

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A Wide Band Oscillator Design Based on Bi-CMOS Active Load Differential Amplifier

2007 IEEE Conference on Electron Devices and Solid-State Circuits, 2007, p.773-776

2007

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The Design of MOS-NDR-Based Cellular Neural Network

The 2006 IEEE International Joint Conference on Neural Network Proceedings, 2006, p.1033-1035

2006

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Investigation of MOS-NDR Voltage Controlled Ring Oscillator Fabricated by CMOS Process

2005 IEEE Conference on Electron Devices and Solid-State Circuits, 2005, p.825-827

2005

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Low Phase Noise and Wide Tuning Range VCO Using the MOS Differential Amplifier with Active Load

Circuits and systems (Irvine, Calif.), 2012-10, Vol.3 (4), p.307-310

2012

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OR and NOR Logic Circuit Design Using Negative Differential Resistance Device Fabricated by CMOS Process

2005 IEEE Conference on Electron Devices and Solid-State Circuits, 2005, p.813-816

2005

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Logic Circuit Design Based on Series-Connected CMOS-NDR Circuit

International Journal of Computer Theory and Engineering, 2013-06, Vol.5 (3), p.562-566

2013

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Design of NDR-Based Oscillators Suitable for the Nano-Based BiCMOS Technique

Applied Mechanics and Materials, 2013-06, Vol.328, p.669-673

2013

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Frequency multiplier design using BiCMOS-based multiple-peak NDR circuit

2010 IEEE International Conference of Electron Devices and Solid-State Circuits (EDSSC), 2010, p.1-3

2010

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Frequency divider design using the combination of transistors and passive devices

2009 13th International Symposium on Antenna Technology and Applied Electromagnetics and the Canadian Radio Science Meeting, 2009, p.1-5

2009

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Five-State Logic Using MOS-HBT-NDR Circuit by Standard SiGe BiCMOS Process

APCCAS 2006 - 2006 IEEE Asia Pacific Conference on Circuits and Systems, 2006, p.1476-1479

2006

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Voltage-controlled multiple-valued logic design using negative differential resistance devices

Design and fabrication of multiple-valued multiplexer using negative differential resistance circuits and standard SiGe process

Standard BiCMOS Implementation of a Two-Peak Negative Differential Resistance Circuit with High and Adjustable Peak-to-Valley Current Ratio

Trivalued Memory Circuit Using Metal–Oxide–Semiconductor Field-Effect Transistor Bipolar-Junction-Transistor Negative-Differential-Resistance Circuits Fabricated by Standard SiGe Process

Multiple-input logic circuit design using BiCMOS-based negative differential resistance circuits

Design and characterization of the negative differential resistance circuits using the CMOS and BiCMOS process

Design of monostable–bistable transition logic element using the BiCMOS-based negative differential resistance circuit

Novel multiple-selected and multiple-valued memory design using negative differential resistance circuits suitable for standard SiGe-based BiCMOS process

Frequency divider design using the combination of transistors and passive devices

Multiple-input NOR logic design using negative differential resistance circuits implemented by standard SiGe process

Design and application of Van Der Pol oscillator using NDR circuit

Design of NDR-Based Multiple-Valued Multiplexer Using Standard SiGe Process

A VHF Oscillator Design Based on BJT Active Load Differential Amplifier

Logic circuit design using monostable–bistable transition logic element based on standard BiCMOS process

Design of AND and NAND Logic Gate Using NDR-BASED Circuit Suitable for CMOS Process

A Wide Band Oscillator Design Based on Bi-CMOS Active Load Differential Amplifier

The Design of MOS-NDR-Based Cellular Neural Network

Investigation of MOS-NDR Voltage Controlled Ring Oscillator Fabricated by CMOS Process

Low Phase Noise and Wide Tuning Range VCO Using the MOS Differential Amplifier with Active Load

OR and NOR Logic Circuit Design Using Negative Differential Resistance Device Fabricated by CMOS Process

Logic Circuit Design Based on Series-Connected CMOS-NDR Circuit

Design of NDR-Based Oscillators Suitable for the Nano-Based BiCMOS Technique

Frequency multiplier design using BiCMOS-based multiple-peak NDR circuit

Frequency divider design using the combination of transistors and passive devices

Five-State Logic Using MOS-HBT-NDR Circuit by Standard SiGe BiCMOS Process

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