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A 4.39-5.26 GHz LC-Tank CMOS Voltage-Controlled Oscillator With Small VCO-Gain Variation

IEEE microwave and wireless components letters, 2009-08, Vol.19 (8), p.524-526

2009

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A Non-Volatile Ternary Content-Addressable Memory Cell for Low-Power and Variation-Toleration Operation

IEEE transactions on magnetics, 2018-02, Vol.54 (2), p.1-3

2018

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Switching Battery Charger Integrated Circuit for Mobile Devices in a 130-nm BCDMOS Process

IEEE transactions on power electronics, 2016-11, Vol.31 (11), p.7943-7952

2016

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Variation-Tolerant Sensing Circuit for Spin-Transfer Torque MRAM

IEEE transactions on circuits and systems. II, Express briefs, 2015-12, Vol.62 (12), p.1134-1138

2015

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Quasi-Resonant (QR) Controller With Adaptive Switching Frequency Reduction Scheme for Flyback Converter

IEEE transactions on industrial electronics (1982), 2016-06, Vol.63 (6), p.3571-3581

2016

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A CCM/DCM Dual-Mode Synchronous Rectification Controller for a High-Efficiency Flyback Converter

IEEE transactions on power electronics, 2014-02, Vol.29 (2), p.768-774

2014

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A Two-Phase Interleaved Power Factor Correction Boost Converter With a Variation-Tolerant Phase Shifting Technique

IEEE transactions on power electronics, 2014-02, Vol.29 (2), p.1032-1040

2014

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A 12-Gb/s Continuous-time Linear Equalizer with Offset Canceller

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2019, 19(2), 86, pp.220-225

2019

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A Multiphase Synchronous Buck Converter With a Fully Integrated Current Balancing Scheme

IEEE transactions on power electronics, 2015-09, Vol.30 (9), p.5159-5169

2015

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A HDMI-to-MHL Video Format Conversion System-on-Chip (SoC) for Mobile Applications

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2018, 18(4), 82, pp.509-517

2018

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5-GHz Low-Phase Noise CMOS Quadrature VCO

IEEE microwave and wireless components letters, 2006-11, Vol.16 (11), p.609-611

2006

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Current Reusing VCO and Divide-by-Two Frequency Divider for Quadrature LO Generation

IEEE microwave and wireless components letters, 2008-06, Vol.18 (6), p.413-415

2008

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A 20-MHz Bandwidth Continuous-Time Sigma-Delta Modulator With Jitter Immunity Improved Full Clock Period SCR (FSCR) DAC and High-Speed DWA

IEEE journal of solid-state circuits, 2011-11, Vol.46 (11), p.2469-2477

2011

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A common-gate switched 0.9-W class-E power amplifier with 41% PAE in 0.25-μm CMOS

IEEE journal of solid-state circuits, 2001-05, Vol.36 (5), p.823-830

2001

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Time-Domain Operational Amplifier With Voltage-Controlled Oscillator and Its Application to Active-RC Analog Filter

IEEE transactions on circuits and systems. II, Express briefs, 2020-03, Vol.67 (3), p.415-419

2020

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A Single-ended Simultaneous Bidirectional Transceiver in 65-nm CMOS Technology

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2016, 16(6), 72, pp.817-824

2016

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A Programmable Logic-in-memory (LiM) based on Magnetic Tunneling Junction (MTJ)

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2018, 18(5), 83, pp.586-592

2018

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A Class-D Amplifier With Pulse Code Modulated (PCM) Digital Input for Digital Hearing Aid

IEEE journal of solid-state circuits, 2013-02, Vol.48 (2), p.465-472

2013

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Active Power Factor Correction (PFC) Circuit With Resistor-Free Zero-Current Detection

IEEE transactions on power electronics, 2011-02, Vol.26 (2), p.630-637

2011

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A Stochastic Flash Analog-to-Digital Converter Linearized by Reference Swapping

IEEE access, 2017-01, Vol.5, p.23046-23051

2017

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A 1.62/2.7Gbps clock and data recovery with pattern based frequency detector for displayport

IEEE transactions on consumer electronics, 2010-11, Vol.56 (4), p.2032-2036

2010

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A 6-Gb/s Wireline Receiver With Intrapair Skew Compensation and Three-Tap Decision-Feedback Equalizer in 28-nm CMOS

IEEE transactions on very large scale integration (VLSI) systems, 2020-05, Vol.28 (5), p.1107-1117

2020

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Display System Interface without Line Memory for Low-Cost System-on-Glass

IEEE transactions on consumer electronics, 2007-11, Vol.53 (4), p.1226-1229

2007

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A 10MHz time-domain-controlled current-mode buck converter with 8.5% to 93% switching duty cycle

2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, p.424-426

2018

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A Continuous-time Sigma-delta Modulator with Clock Jitter Tolerant Self-resetting Return-to-zero Feedback DAC

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2018, 18(4), 82, pp.468-474

2018

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A 4.39-5.26 GHz LC-Tank CMOS Voltage-Controlled Oscillator With Small VCO-Gain Variation

A Non-Volatile Ternary Content-Addressable Memory Cell for Low-Power and Variation-Toleration Operation

Switching Battery Charger Integrated Circuit for Mobile Devices in a 130-nm BCDMOS Process

Variation-Tolerant Sensing Circuit for Spin-Transfer Torque MRAM

Quasi-Resonant (QR) Controller With Adaptive Switching Frequency Reduction Scheme for Flyback Converter

A CCM/DCM Dual-Mode Synchronous Rectification Controller for a High-Efficiency Flyback Converter

A Two-Phase Interleaved Power Factor Correction Boost Converter With a Variation-Tolerant Phase Shifting Technique

A 12-Gb/s Continuous-time Linear Equalizer with Offset Canceller

A Multiphase Synchronous Buck Converter With a Fully Integrated Current Balancing Scheme

A HDMI-to-MHL Video Format Conversion System-on-Chip (SoC) for Mobile Applications

5-GHz Low-Phase Noise CMOS Quadrature VCO

Current Reusing VCO and Divide-by-Two Frequency Divider for Quadrature LO Generation

A 20-MHz Bandwidth Continuous-Time Sigma-Delta Modulator With Jitter Immunity Improved Full Clock Period SCR (FSCR) DAC and High-Speed DWA

A common-gate switched 0.9-W class-E power amplifier with 41% PAE in 0.25-μm CMOS

Time-Domain Operational Amplifier With Voltage-Controlled Oscillator and Its Application to Active-RC Analog Filter

A Single-ended Simultaneous Bidirectional Transceiver in 65-nm CMOS Technology

A Programmable Logic-in-memory (LiM) based on Magnetic Tunneling Junction (MTJ)

A Class-D Amplifier With Pulse Code Modulated (PCM) Digital Input for Digital Hearing Aid

Active Power Factor Correction (PFC) Circuit With Resistor-Free Zero-Current Detection

A Stochastic Flash Analog-to-Digital Converter Linearized by Reference Swapping

A 1.62/2.7Gbps clock and data recovery with pattern based frequency detector for displayport

A 6-Gb/s Wireline Receiver With Intrapair Skew Compensation and Three-Tap Decision-Feedback Equalizer in 28-nm CMOS

Display System Interface without Line Memory for Low-Cost System-on-Glass

A 10MHz time-domain-controlled current-mode buck converter with 8.5% to 93% switching duty cycle

A Continuous-time Sigma-delta Modulator with Clock Jitter Tolerant Self-resetting Return-to-zero Feedback DAC

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