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Enhancing Cognitive Function in Older Adults through Processing Speed Training: Implications for Cognitive Health Awareness

Healthcare (Basel), 2024-02, Vol.12 (5), p.532

2024

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A Low-Current Digitally Predistorted Direct-Conversion Transmitter With 25% Duty-Cycle Passive Mixer

IEEE transactions on microwave theory and techniques, 2014-04, Vol.62 (4), p.726-731

2014

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A Digital Intensive Fractional-N PLL and All-Digital Self-Calibration Schemes

IEEE journal of solid-state circuits, 2009-08, Vol.44 (8), p.2182-2192

2009

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A wide-range and fast-locking all-digital cycle-controlled delay-locked loop

IEEE journal of solid-state circuits, 2005-03, Vol.40 (3), p.661-670

2005

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A SAW-Less GSM/GPRS/EDGE Receiver Embedded in 65-nm SoC

IEEE journal of solid-state circuits, 2011-12, Vol.46 (12), p.3047-3060

2011

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Dietary Perilla Oil Inhibits Proinflammatory Cytokine Production in the Bronchoalveolar Lavage Fluid of Ovalbumin-Challenged Mice

Lipids, 2008-06, Vol.43 (6), p.499-506

2008

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Dietary perilla oil lowers serum lipids and ovalbumin-specific IgG1, but increases total IgE levels in ovalbumin-challenged mice

Food and chemical toxicology, 2009-04, Vol.47 (4), p.848-854

2009

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A wide-range delay-locked loop with a fixed latency of one clock cycle

IEEE journal of solid-state circuits, 2002-08, Vol.37 (8), p.1021-1027

2002

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A spread-spectrum clock generator with triangular modulation

IEEE journal of solid-state circuits, 2003-04, Vol.38 (4), p.673-676

2003

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Protective effect of dietary perilla oil on allergic inflammation in asthmatic mice

European journal of lipid science and technology, 2012-09, Vol.114 (9), p.1007-1015

2012

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A 0.7-2-GHz self-calibrated multiphase delay-locked loop

IEEE journal of solid-state circuits, 2006-05, Vol.41 (5), p.1051-1061

2006

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High Dose Vitamin C Supplementation Increases the Th1/Th2 Cytokine Secretion Ratio, but Decreases Eosinophilic Infiltration in Bronchoalveolar Lavage Fluid of Ovalbumin-Sensitized and Challenged Mice

Journal of agricultural and food chemistry, 2009-11, Vol.57 (21), p.10471-10476

2009

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A low-current digitally predistorted 3G-4G transmitter in 40nm CMOS

2013 IEEE Radio Frequency Integrated Circuits Symposium (RFIC), 2013, p.141-144

2013

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Memory training program for older adults

Educational gerontology, 2018-10, Vol.44 (10), p.614-626

2018

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Low jitter and multirate clock and data recovery circuit using a MSADLL for chip-to-chip interconnection

IEEE transactions on circuits and systems. 1, Fundamental theory and applications, 2004-12, Vol.51 (12), p.2356-2364

2004

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A fast locking and low jitter delay-locked loop using DHDL

IEEE journal of solid-state circuits, 2003-02, Vol.38 (2), p.343-346

2003

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A 65-nm GSM/GPRS/EDGE SoC With Integrated BT/FM

IEEE journal of solid-state circuits, 2013-05, Vol.48 (5), p.1161-1173

2013

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An analog enhanced all digtial RF fractional-N PLL with self-calibrated capability

2008 IEEE Custom Integrated Circuits Conference, 2008, p.749-752

2008

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A fractional spur reduction technique for RF TDC-based all digital PLLs

ESSCIRC 2008 - 34th European Solid-State Circuits Conference, 2008, p.422-425

2008

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A Fractional Spur-Free ADPLL with Loop-Gain Calibration and Phase-Noise Cancellation for GSM/GPRS/EDGE

2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, 2008, p.200-606

2008

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A HSPA+/WCDMA/EDGE 40nm Modem SoC with embedded RF transceiver supporting RX diversity

2014 IEEE Radio Frequency Integrated Circuits Symposium, 2014, p.133-136

2014

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A 65nm GSM/GPRS/EDGE SoC with Integrated BT/FM

2012 IEEE Radio Frequency Integrated Circuits Symposium, 2012, p.403-406

2012

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A transfer-curve-folded DCO in 0.13μm CMOS

2008 IEEE Radio Frequency Integrated Circuits Symposium, 2008, p.391-394

2008

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A 1.6-880MHz synthesizable ADPLL in 0.13um CMOS

2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT), 2008, p.9-12

2008

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A shifted-averaging VCO with precise multiphase outputs and low jitter operation

ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705), 2003, p.647-650

2003

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Enhancing Cognitive Function in Older Adults through Processing Speed Training: Implications for Cognitive Health Awareness

A Low-Current Digitally Predistorted Direct-Conversion Transmitter With 25% Duty-Cycle Passive Mixer

A Digital Intensive Fractional-N PLL and All-Digital Self-Calibration Schemes

A wide-range and fast-locking all-digital cycle-controlled delay-locked loop

A SAW-Less GSM/GPRS/EDGE Receiver Embedded in 65-nm SoC

Dietary Perilla Oil Inhibits Proinflammatory Cytokine Production in the Bronchoalveolar Lavage Fluid of Ovalbumin-Challenged Mice

Dietary perilla oil lowers serum lipids and ovalbumin-specific IgG1, but increases total IgE levels in ovalbumin-challenged mice

A wide-range delay-locked loop with a fixed latency of one clock cycle

A spread-spectrum clock generator with triangular modulation

Protective effect of dietary perilla oil on allergic inflammation in asthmatic mice

A 0.7-2-GHz self-calibrated multiphase delay-locked loop

High Dose Vitamin C Supplementation Increases the Th1/Th2 Cytokine Secretion Ratio, but Decreases Eosinophilic Infiltration in Bronchoalveolar Lavage Fluid of Ovalbumin-Sensitized and Challenged Mice

A low-current digitally predistorted 3G-4G transmitter in 40nm CMOS

Memory training program for older adults

Low jitter and multirate clock and data recovery circuit using a MSADLL for chip-to-chip interconnection

A fast locking and low jitter delay-locked loop using DHDL

A 65-nm GSM/GPRS/EDGE SoC With Integrated BT/FM

An analog enhanced all digtial RF fractional-N PLL with self-calibrated capability

A fractional spur reduction technique for RF TDC-based all digital PLLs

A Fractional Spur-Free ADPLL with Loop-Gain Calibration and Phase-Noise Cancellation for GSM/GPRS/EDGE

A HSPA+/WCDMA/EDGE 40nm Modem SoC with embedded RF transceiver supporting RX diversity

A 65nm GSM/GPRS/EDGE SoC with Integrated BT/FM

A transfer-curve-folded DCO in 0.13μm CMOS

A 1.6-880MHz synthesizable ADPLL in 0.13um CMOS

A shifted-averaging VCO with precise multiphase outputs and low jitter operation

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