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A cost-benefit analysis for reconfigurable PV modules under shading

Solar energy, 2019-01, Vol.178, p.69-78

2019

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A method for detailed, short-term energy yield forecasting of photovoltaic installations

Renewable energy, 2019-01, Vol.130, p.122-129

2019

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Performance Analysis of Slotted Carrier Sense IEEE 802.15.4 Medium Access Layer

IEEE transactions on wireless communications, 2008-09, Vol.7 (9), p.3359-3371

2008

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A Distributed Multichannel MAC Protocol for Multihop Cognitive Radio Networks

IEEE transactions on vehicular technology, 2010-01, Vol.59 (1), p.446-459

2010

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Systematic cross-validation of photovoltaic energy yield models for dynamic environmental conditions

Solar energy, 2017-10, Vol.155, p.698-705

2017

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Scheduling and Resource Allocation for SVC Streaming Over OFDM Downlink Systems

IEEE transactions on circuits and systems for video technology, 2009-10, Vol.19 (10), p.1549-1555

2009

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IEEE_Xplore

Proactive Run-Time Mitigation for Time-Critical Applications Using Dynamic Scenario Methodology

2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2022, p.616-621

2022

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IEEE_Xplore

A 3.6 pJ/Access 480 MHz, 128 kb On-Chip SRAM With 850 MHz Boost Mode in 90 nm CMOS With Tunable Sense Amplifiers

IEEE journal of solid-state circuits, 2009-07, Vol.44 (7), p.2065-2077

2009

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IEEE_Xplore

Atomistic approach to variability of bias-temperature instability in circuit simulations

2011 International Reliability Physics Symposium, 2011, p.XT.3.1-XT.3.5

2011

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IEEE_Xplore

Stream-Centric Stereo Matching and View Synthesis: A High-Speed Approach on GPUs

IEEE transactions on circuits and systems for video technology, 2009-11, Vol.19 (11), p.1598-1611

2009

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IEEE_Xplore

Circuit Model for the Efficient Co-Simulation of Spin Qubits and their Control & Readout Circuitry

ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC), 2021, p.63-66

2021

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A Low-Power Embedded SRAM for Wireless Applications

IEEE journal of solid-state circuits, 2007-07, Vol.42 (7), p.1607-1617

2007

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IEEE_Xplore

Circuit Model for the Efficient Co-Simulation of Spin Qubits and their Control & Readout Circuitry

ESSDERC 2021 - IEEE 51st European Solid-State Device Research Conference (ESSDERC), 2021, p.63-66

2021

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Concepts and Implementation of Spatial Division Multiplexing for Guaranteed Throughput in Networks-on-Chip

IEEE transactions on computers, 2008-09, Vol.57 (9), p.1182-1195

2008

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IEEE_Xplore

Methodology for Energy-Flexibility Space Exploration and Mapping of Multimedia Applications to Single-Processor Platform Styles

IEEE transactions on circuits and systems for video technology, 2011-08, Vol.21 (8), p.1027-1039

2011

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IEEE_Xplore

Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives

Design, Automation and Test in Europe, 2005, Vol.1, p.196-201

2005

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IEEE_Xplore

Memory optimization of MAP turbo decoder algorithms

IEEE transactions on very large scale integration (VLSI) systems, 2001-04, Vol.9 (2), p.305-312

2001

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IEEE_Xplore

MEERA: Cross-Layer Methodology for Energy Efficient Resource Allocation in Wireless Networks

IEEE transactions on wireless communications, 2008-01, Vol.7 (1), p.98-109

2008

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IEEE_Xplore

Linking nanotechnology to gigawatts: Creating building blocks for smart PV modules

Progress in photovoltaics, 2011-11, Vol.19 (7), p.772-780

2011

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Defect-based methodology for workload-dependent circuit lifetime projections - Application to SRAM

2013 IEEE International Reliability Physics Symposium (IRPS), 2013, p.3A.4.1-3A.4.7

2013

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IEEE_Xplore

Fast multidimension multichoice knapsack heuristic for MP-SoC runtime management

ACM transactions on embedded computing systems, 2011-04, Vol.10 (3), p.1-16

2011

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Data and memory optimization techniques for embedded systems

ACM transactions on design automation of electronic systems, 2001-04, Vol.6 (2), p.149-206

2001

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Design and Synthesis of Pareto Buffers Offering Large Range Runtime Energy/Delay Tradeoffs Via Combined Buffer Size and Supply Voltage Tuning

IEEE transactions on very large scale integration (VLSI) systems, 2009-01, Vol.17 (1), p.117-127

2009

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IEEE_Xplore

Distributed Loop Controller for Multithreading in Unithreaded ILP Architectures

IEEE transactions on computers, 2009-03, Vol.58 (3), p.311-321

2009

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IEEE_Xplore

Clustered loop buffer organization for low energy VLIW embedded processors

IEEE transactions on computers, 2005-06, Vol.54 (6), p.672-683

2005

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IEEE_Xplore

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A cost-benefit analysis for reconfigurable PV modules under shading

A method for detailed, short-term energy yield forecasting of photovoltaic installations

Performance Analysis of Slotted Carrier Sense IEEE 802.15.4 Medium Access Layer

A Distributed Multichannel MAC Protocol for Multihop Cognitive Radio Networks

Systematic cross-validation of photovoltaic energy yield models for dynamic environmental conditions

Scheduling and Resource Allocation for SVC Streaming Over OFDM Downlink Systems

Proactive Run-Time Mitigation for Time-Critical Applications Using Dynamic Scenario Methodology

A 3.6 pJ/Access 480 MHz, 128 kb On-Chip SRAM With 850 MHz Boost Mode in 90 nm CMOS With Tunable Sense Amplifiers

Atomistic approach to variability of bias-temperature instability in circuit simulations

Stream-Centric Stereo Matching and View Synthesis: A High-Speed Approach on GPUs

Circuit Model for the Efficient Co-Simulation of Spin Qubits and their Control & Readout Circuitry

A Low-Power Embedded SRAM for Wireless Applications

Circuit Model for the Efficient Co-Simulation of Spin Qubits and their Control & Readout Circuitry

Concepts and Implementation of Spatial Division Multiplexing for Guaranteed Throughput in Networks-on-Chip

Methodology for Energy-Flexibility Space Exploration and Mapping of Multimedia Applications to Single-Processor Platform Styles

Energy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives

Memory optimization of MAP turbo decoder algorithms

MEERA: Cross-Layer Methodology for Energy Efficient Resource Allocation in Wireless Networks

Linking nanotechnology to gigawatts: Creating building blocks for smart PV modules

Defect-based methodology for workload-dependent circuit lifetime projections - Application to SRAM

Fast multidimension multichoice knapsack heuristic for MP-SoC runtime management

Data and memory optimization techniques for embedded systems

Design and Synthesis of Pareto Buffers Offering Large Range Runtime Energy/Delay Tradeoffs Via Combined Buffer Size and Supply Voltage Tuning

Distributed Loop Controller for Multithreading in Unithreaded ILP Architectures

Clustered loop buffer organization for low energy VLIW embedded processors

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