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RRAM Defect Modeling and Failure Analysis Based on March Test and a Novel Squeeze-Search Scheme

IEEE transactions on computers, 2015-01, Vol.64 (1), p.180-190

2015

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Low Store Energy, Low VDDmin, 8T2R Nonvolatile Latch and SRAM With Vertical-Stacked Resistive Memory (Memristor) Devices for Low Power Mobile Applications

IEEE journal of solid-state circuits, 2012-06, Vol.47 (6), p.1483-1496

2012

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Reprogrammable Redundancy for SRAM-Based Cache V Reduction in a 28-nm RISC-V Processor

IEEE journal of solid-state circuits, 2017-10, Vol.52 (10), p.2589-2600

2017

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A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI

IEEE transactions on very large scale integration (VLSI) systems, 2020-12, Vol.28 (12), p.2721-2725

2020

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A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI

IEEE journal of solid-state circuits, 2016-04, Vol.51 (4), p.930-942

2016

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A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI

IEEE journal of solid-state circuits, 2017-07, Vol.52 (7), p.1863-1875

2017

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An Agile Approach to Building RISC-V Microprocessors

IEEE MICRO, 2016-03, Vol.36 (2), p.8-20

2016

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BROOM: An Open-Source Out-of-Order Processor With Resilient Low-Voltage Operation in 28-nm CMOS

IEEE MICRO, 2019-03, Vol.39 (2), p.52-60

2019

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A Differential 2R Crosspoint RRAM Array With Zero Standby Current

IEEE transactions on circuits and systems. II, Express briefs, 2015-05, Vol.62 (5), p.461-465

2015

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A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes

IEEE journal of solid-state circuits, 2013-03, Vol.48 (3), p.878-891

2013

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Cache Resiliency Techniques for a Low-Voltage RISC-V Out-of-Order Processor in 28-nm CMOS

IEEE solid-state circuits letters, 2018-12, Vol.1 (12), p.229-232

2018

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Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 2016, p.269-272

2016

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Noise-Immune Embedded NAND-ROM Using a Dynamic Split Source-Line Scheme for VDDmin and Speed Improvements

IEEE journal of solid-state circuits, 2010-10, Vol.45 (10), p.2142-2155

2010

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An In-Flash Binary Neural Network Accelerator with SLC NAND Flash Array

2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, p.1-5

2020

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A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability

2011 IEEE International Solid-State Circuits Conference, 2011, p.200-202

2011

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A Mott Insulator-Based Oscillator Circuit for Reservoir Computing

2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, p.1-5

2020

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A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI

2015 Symposium on VLSI Circuits (VLSI Circuits), 2015, p.C316-C317

2015

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Challenges and trends in low-power 3D die-stacked IC designs using RAM, memristor logic, and resistive memory (ReRAM)

2011 9th IEEE International Conference on ASIC, 2011, p.299-302

2011

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Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking

2015 IEEE Hot Chips 27 Symposium (HCS), 2015, p.1-45

2015

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Endurance-aware circuit designs of nonvolatile logic and nonvolatile sram using resistive memory (memristor) device

17th Asia and South Pacific Design Automation Conference, 2012, p.329-334

2012

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An Out-of-Order RISC-V Processor with Resilient Low-Voltage Operation in 28NM CMOS

2018 IEEE Symposium on VLSI Circuits, 2018, p.61-62

2018

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Non-Volatile Memory Array Based Quantization- and Noise-Resilient LSTM Neural Networks

2019 IEEE International Conference on Rebooting Computing (ICRC), 2019, p.1-9

2019

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Improving Noise Tolerance of Hardware Accelerated Artificial Neural Networks

2018 17th IEEE International Conference on Machine Learning and Applications (ICMLA), 2018, p.797-801

2018

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A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications

2010 IEEE International Solid-State Circuits Conference - (ISSCC), 2010, p.266-267

2010

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A double-tail sense amplifier for low-voltage SRAM in 28nm technology

2016 IEEE Asian Solid-State Circuits Conference (A-SSCC), 2016, p.181-184

2016

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RRAM Defect Modeling and Failure Analysis Based on March Test and a Novel Squeeze-Search Scheme

Low Store Energy, Low VDDmin, 8T2R Nonvolatile Latch and SRAM With Vertical-Stacked Resistive Memory (Memristor) Devices for Low Power Mobile Applications

Reprogrammable Redundancy for SRAM-Based Cache V Reduction in a 28-nm RISC-V Processor

A Dual-Core RISC-V Vector Processor With On-Chip Fine-Grain Power Management in 28-nm FD-SOI

A RISC-V Vector Processor With Simultaneous-Switching Switched-Capacitor DC-DC Converters in 28 nm FDSOI

A RISC-V Processor SoC With Integrated Power Management at Submicrosecond Timescales in 28 nm FD-SOI

An Agile Approach to Building RISC-V Microprocessors

BROOM: An Open-Source Out-of-Order Processor With Resilient Low-Voltage Operation in 28-nm CMOS

A Differential 2R Crosspoint RRAM Array With Zero Standby Current

A High-Speed 7.2-ns Read-Write Random Access 4-Mb Embedded Resistive RAM (ReRAM) Macro Using Process-Variation-Tolerant Current-Mode Read Schemes

Cache Resiliency Techniques for a Low-Voltage RISC-V Out-of-Order Processor in 28-nm CMOS

Sub-microsecond adaptive voltage scaling in a 28nm FD-SOI processor SoC

Noise-Immune Embedded NAND-ROM Using a Dynamic Split Source-Line Scheme for VDDmin and Speed Improvements

An In-Flash Binary Neural Network Accelerator with SLC NAND Flash Array

A 4Mb embedded SLC resistive-RAM macro with 7.2ns read-write random-access time and 160ns MLC-access capability

A Mott Insulator-Based Oscillator Circuit for Reservoir Computing

A RISC-V vector processor with tightly-integrated switched-capacitor DC-DC converters in 28nm FDSOI

Challenges and trends in low-power 3D die-stacked IC designs using RAM, memristor logic, and resistive memory (ReRAM)

Raven: A 28nm RISC-V vector processor with integrated switched-capacitor DC-DC converters and adaptive clocking

Endurance-aware circuit designs of nonvolatile logic and nonvolatile sram using resistive memory (memristor) device

An Out-of-Order RISC-V Processor with Resilient Low-Voltage Operation in 28NM CMOS

Non-Volatile Memory Array Based Quantization- and Noise-Resilient LSTM Neural Networks

Improving Noise Tolerance of Hardware Accelerated Artificial Neural Networks

A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications

A double-tail sense amplifier for low-voltage SRAM in 28nm technology

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