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Junctionless Multiple-Gate (JLMG) MOSFETs: A Unified Subthreshold Current Model to Assess Noise Margin of Subthreshold Logic Gate

IEEE transactions on electron devices, 2021-10, Vol.68 (10), p.5330-5334

Chiang, Te-Kuang

2021

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A New Quasi-2-D Threshold Voltage Model for Short-Channel Junctionless Cylindrical Surrounding Gate (JLCSG) MOSFETs

IEEE transactions on electron devices, 2012-11, Vol.59 (11), p.3127-3129

CHIANG, Te-Kuang

2012

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IEEE_Xplore

A Compact Model for Threshold Voltage of Surrounding-Gate MOSFETs With Localized Interface Trapped Charges

IEEE transactions on electron devices, 2011-02, Vol.58 (2), p.567-571

CHIANG, Te-Kuang

2011

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IEEE_Xplore

A Short-Channel-Effect-Degraded Noise Margin Model for Junctionless Double-Gate MOSFET Working on Subthreshold CMOS Logic Gates

IEEE transactions on electron devices, 2016-08, Vol.63 (8), p.3354-3359

Chiang, Te-Kuang

2016

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IEEE_Xplore

A Novel Scaling Theory for Fully Depleted, Multiple-Gate MOSFET, Including Effective Number of Gates (ENGs)

IEEE transactions on electron devices, 2014-02, Vol.61 (2), p.631-633

Chiang, Te-Kuang

2014

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IEEE_Xplore

A New Device-Physics-Based Noise Margin/Logic Swing Model of Surrounding-Gate MOSFET Working on Subthreshold Logic Gate

IEEE transactions on electron devices, 2016-11, Vol.63 (11), p.4209-4217

Chiang, Te-Kuang

2016

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IEEE_Xplore

A New Subthreshold Current Model for Junctionless Trigate MOSFETs to Examine Interface-Trapped Charge Effects

IEEE transactions on electron devices, 2015-09, Vol.62 (9), p.2745-2750

Chiang, Te-Kuang

2015

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IEEE_Xplore

A Novel Effective-Conducting-Path-Induced Scaling Length Model and Its Application for Assessing Short-Channel Performance of Multiple-Gate MOSFETs

IEEE transactions on electron devices, 2018-10, Vol.65 (10), p.4535-4541

2018

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IEEE_Xplore

A New Threshold Voltage Model for Short-Channel Junctionless Inverted T-Shaped Gate FETs (JLITFET)

IEEE transactions on nanotechnology, 2016-05, Vol.15 (3), p.442-447

Chiang, Te-Kuang

2016

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IEEE_Xplore

A Quasi-Two-Dimensional Threshold Voltage Model for Short-Channel Junctionless Double-Gate MOSFETs

IEEE transactions on electron devices, 2012-09, Vol.59 (9), p.2284-2289

Chiang, Te-Kuang

2012

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IEEE_Xplore

A Novel Scaling Theory for Fully Depleted Omega-Gate MOSFETs Included With Equivalent Number of Gates

IEEE transactions on electron devices, 2014-03, Vol.61 (3), p.926-929

Chiang, Te-Kuang

2014

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IEEE_Xplore

A Novel Quasi-3-D Threshold Voltage Model for Fully Depleted Quadruple-Gate (FDQG) MOSFETs: With Equivalent Number of Gates (ENG) Included

IEEE transactions on nanotechnology, 2013-11, Vol.12 (6), p.1022-1025

Chiang, Te-Kuang

2013

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IEEE_Xplore

A New Effective-Conducting-Path-Driven Subthreshold Behavior Model for Junctionless Dual-Material Omega-Gate Nano-MOSFETs

IEEE transactions on nanotechnology, 2019, Vol.18, p.904-910

2019

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IEEE_Xplore

A New Short-Channel-Effect-Degraded Subthreshold Behavior Model for Double-Fin Multichannel FETs (DFMcFETs)

IEEE transactions on nanotechnology, 2017-01, Vol.16 (1), p.16-22

Te-Kuang Chiang

2017

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IEEE_Xplore

A Novel Quasi-3-D Interface-Trapped-Charge-Induced Threshold Voltage Model for Quadruple-Gate MOSFETs, Including Equivalent Number of Gates

IEEE transactions on electron devices, 2014-05, Vol.61 (5), p.1615-1618

Chiang Te-Kuang

2014

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IEEE_Xplore

A New Quasi-3-D Compact Threshold Voltage Model for Pi-Gate (ΠG) MOSFETs With the Interface Trapped Charges

IEEE transactions on nanotechnology, 2015-05, Vol.14 (3), p.555-560

Chiang, Te-Kuang

2015

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IEEE_Xplore

A new two-dimensional analytical subthreshold behavior model for short-channel tri-material gate-stack SOI MOSFET’s

Microelectronics and reliability, 2009-02, Vol.49 (2), p.113-119

Chiang, Te-Kuang

2009

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A Quasi-3-D Scaling Length Model for Trapezoidal FinFET and Its Application to Subthreshold Behavior Analysis

IEEE transactions on nanotechnology, 2017-03, Vol.16 (2), p.281-289

2017

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IEEE_Xplore

A New Device-Parameter-Oriented DC Power Model for Symmetric Operation of Junctionless Double-Gate mosfet Working on Low-Power CMOS Subthreshold Logic Gates

IEEE transactions on nanotechnology, 2018-05, Vol.17 (3), p.424-431

2018

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IEEE_Xplore

A ballistic model for subthreshold current and threshold voltage of the dual-material-gate nanosheet MOSFET

Micro and Nanostructures, 2024-03, Vol.187, p.207761, Article 207761

Chiang, Te-Kuang

2024

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A Unified Quasi-3D Subthreshold Behavior Model for Multiple-Gate mosfets

IEEE transactions on nanotechnology, 2018-07, Vol.17 (4), p.763-771

2018

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IEEE_Xplore

A New Interface-Trapped-Charge-Degraded Subthreshold Current Model for Quadruple-Gate MOSFETs

IEEE transactions on electron devices, 2014-05, Vol.61 (5), p.1611-1614

Chiang Te-Kuang

2014

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IEEE_Xplore

A New Two-Dimensional Analytical Threshold Voltage Model for Short-Channel Triple-Material Surrounding-Gate Metal--Oxide--Semiconductor Field-Effect Transistors

Japanese Journal of Applied Physics, 2012-05, Vol.51 (5), p.054301-054301-5

2012

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The improvement of dynamic characteristics of ultrasonic therapeutic transducers using fine-grain PZT-based piezoceramics

IEEE transactions on ultrasonics, ferroelectrics, and frequency control, 2009-01, Vol.56 (1), p.156-166

2009

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IEEE_Xplore

Novel Omega-Gate heterojunction tunneling FET with a new analytical model

Semiconductor science and technology, 2021-06, Vol.36 (6), p.65011

2021

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Junctionless Multiple-Gate (JLMG) MOSFETs: A Unified Subthreshold Current Model to Assess Noise Margin of Subthreshold Logic Gate

A New Quasi-2-D Threshold Voltage Model for Short-Channel Junctionless Cylindrical Surrounding Gate (JLCSG) MOSFETs

A Compact Model for Threshold Voltage of Surrounding-Gate MOSFETs With Localized Interface Trapped Charges

A Short-Channel-Effect-Degraded Noise Margin Model for Junctionless Double-Gate MOSFET Working on Subthreshold CMOS Logic Gates

A Novel Scaling Theory for Fully Depleted, Multiple-Gate MOSFET, Including Effective Number of Gates (ENGs)

A New Device-Physics-Based Noise Margin/Logic Swing Model of Surrounding-Gate MOSFET Working on Subthreshold Logic Gate

A New Subthreshold Current Model for Junctionless Trigate MOSFETs to Examine Interface-Trapped Charge Effects

A Novel Effective-Conducting-Path-Induced Scaling Length Model and Its Application for Assessing Short-Channel Performance of Multiple-Gate MOSFETs

A New Threshold Voltage Model for Short-Channel Junctionless Inverted T-Shaped Gate FETs (JLITFET)

A Quasi-Two-Dimensional Threshold Voltage Model for Short-Channel Junctionless Double-Gate MOSFETs

A Novel Scaling Theory for Fully Depleted Omega-Gate MOSFETs Included With Equivalent Number of Gates

A Novel Quasi-3-D Threshold Voltage Model for Fully Depleted Quadruple-Gate (FDQG) MOSFETs: With Equivalent Number of Gates (ENG) Included

A New Effective-Conducting-Path-Driven Subthreshold Behavior Model for Junctionless Dual-Material Omega-Gate Nano-MOSFETs

A New Short-Channel-Effect-Degraded Subthreshold Behavior Model for Double-Fin Multichannel FETs (DFMcFETs)

A Novel Quasi-3-D Interface-Trapped-Charge-Induced Threshold Voltage Model for Quadruple-Gate MOSFETs, Including Equivalent Number of Gates

A New Quasi-3-D Compact Threshold Voltage Model for Pi-Gate (ΠG) MOSFETs With the Interface Trapped Charges

A new two-dimensional analytical subthreshold behavior model for short-channel tri-material gate-stack SOI MOSFET’s

A Quasi-3-D Scaling Length Model for Trapezoidal FinFET and Its Application to Subthreshold Behavior Analysis

A New Device-Parameter-Oriented DC Power Model for Symmetric Operation of Junctionless Double-Gate mosfet Working on Low-Power CMOS Subthreshold Logic Gates

A ballistic model for subthreshold current and threshold voltage of the dual-material-gate nanosheet MOSFET

A Unified Quasi-3D Subthreshold Behavior Model for Multiple-Gate mosfets

A New Interface-Trapped-Charge-Degraded Subthreshold Current Model for Quadruple-Gate MOSFETs

A New Two-Dimensional Analytical Threshold Voltage Model for Short-Channel Triple-Material Surrounding-Gate Metal--Oxide--Semiconductor Field-Effect Transistors

The improvement of dynamic characteristics of ultrasonic therapeutic transducers using fine-grain PZT-based piezoceramics

Novel Omega-Gate heterojunction tunneling FET with a new analytical model

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