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Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis

IEEE journal of solid-state circuits, 1994-03, Vol.29 (3), p.226-238

1994

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Anaconda: simulation-based synthesis of analog circuits via stochastic pattern search

IEEE transactions on computer-aided design of integrated circuits and systems, 2000-06, Vol.19 (6), p.703-717

2000

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A post-CMOS micromachined lateral accelerometer

Journal of microelectromechanical systems, 2002-06, Vol.11 (3), p.188-195

2002

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OASYS: a framework for analog circuit synthesis

IEEE transactions on computer-aided design of integrated circuits and systems, 1989-12, Vol.8 (12), p.1247-1266

1989

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Micromachined high-Q inductors in a 0.18-μm copper interconnect low-k dielectric CMOS process

IEEE journal of solid-state circuits, 2002-03, Vol.37 (3), p.394-403

2002

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Laminated, sacrificial-poly MEMS technology in standard CMOS

Sensors and actuators. A, Physical, 2000-08, Vol.85 (1), p.346-355

2000

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A low-noise low-offset capacitive sensing amplifier for a 50- mu g/[radic]Hz monolithic CMOS MEMS accelerometer

IEEE journal of solid-state circuits, 2004-05, Vol.39 (5)

2004

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Synthesis of high-performance analog circuits in ASTRX/OBLX

IEEE transactions on computer-aided design of integrated circuits and systems, 1996-03, Vol.15 (3), p.273-294

1996

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What if wireless routers were social? approaching wireless mesh networks from a social networks perspective

IEEE wireless communications, 2012-12, Vol.19 (6), p.36-43

2012

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A Transformer-Combined 31.5 dBm Outphasing Power Amplifier in 45 nm LP CMOS With Dynamic Power Control for Back-Off Power Efficiency Enhancement

IEEE journal of solid-state circuits, 2012-07, Vol.47 (7), p.1646-1658

2012

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Trimming analog circuits using floating-gate analog MOS memory

IEEE journal of solid-state circuits, 1989-12, Vol.24 (6), p.1569-1575

Carley, L.R.

1989

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Device-level early floorplanning algorithms for RF circuits

IEEE transactions on computer-aided design of integrated circuits and systems, 1999-04, Vol.18 (4), p.375-388

1999

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Sizing of cell-level analog circuits using constrained optimization techniques

IEEE journal of solid-state circuits, 1993-03, Vol.28 (3), p.233-241

1993

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Exploring the design space of mixed swing quadrail for low-power digital circuits

IEEE transactions on very large scale integration (VLSI) systems, 1997-12, Vol.5 (4), p.388-400

1997

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Addressing noise decoupling in mixed-signal IC's: power distribution design and cell customization

IEEE journal of solid-state circuits, 1995-03, Vol.30 (3), p.321-326, Article 321

1995

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Substrate-aware mixed-signal macrocell placement in WRIGHT

IEEE journal of solid-state circuits, 1995-03, Vol.30 (3), p.269-278

1995

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Performance comparison of detection methods in magnetic recording

IEEE transactions on magnetics, 1990-11, Vol.26 (6), p.3155-3172

1990

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A noise-shaping coder topology for 15+ bit converters

IEEE journal of solid-state circuits, 1989-04, Vol.24 (2), p.267-273

Carley, L.R.

1989

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Media and tip trajectory optimization for high-density MFM-based perpendicular recording

IEEE transactions on magnetics, 2005-03, Vol.41 (3), p.1209-1217

2005

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KOAN/ANAGRAM II: new tools for device-level analog placement and routing

IEEE journal of solid-state circuits, 1991-03, Vol.26 (3), p.330-342

1991

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A low-power backward equalizer for DFE read-channel applications

IEEE journal of solid-state circuits, 1997-02, Vol.32 (2), p.270-273

1997

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An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC

IEEE journal of solid-state circuits, 1995-03, Vol.30 (3), p.173-183

1995

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Adaptive continuous-time equalization followed by FDTS/DF sequence detection

IEEE transactions on magnetics, 1995-03, Vol.31 (2), p.1089-1094

1995

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Performance analysis of a 0.3-Tb/in(2) low-power MFM-based scanning-probe device

IEEE transactions on magnetics, 2003-11, Vol.39 (6), p.3566-3574

2003

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System design considerations for MEMS-actuated magnetic-probe-based mass storage

IEEE transactions on magnetics, 2001-03, Vol.37 (2), p.657-662

2001

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Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis

Anaconda: simulation-based synthesis of analog circuits via stochastic pattern search

A post-CMOS micromachined lateral accelerometer

OASYS: a framework for analog circuit synthesis

Micromachined high-Q inductors in a 0.18-μm copper interconnect low-k dielectric CMOS process

Laminated, sacrificial-poly MEMS technology in standard CMOS

A low-noise low-offset capacitive sensing amplifier for a 50- mu g/[radic]Hz monolithic CMOS MEMS accelerometer

Synthesis of high-performance analog circuits in ASTRX/OBLX

What if wireless routers were social? approaching wireless mesh networks from a social networks perspective

A Transformer-Combined 31.5 dBm Outphasing Power Amplifier in 45 nm LP CMOS With Dynamic Power Control for Back-Off Power Efficiency Enhancement

Trimming analog circuits using floating-gate analog MOS memory

Device-level early floorplanning algorithms for RF circuits

Sizing of cell-level analog circuits using constrained optimization techniques

Exploring the design space of mixed swing quadrail for low-power digital circuits

Addressing noise decoupling in mixed-signal IC's: power distribution design and cell customization

Substrate-aware mixed-signal macrocell placement in WRIGHT

Performance comparison of detection methods in magnetic recording

A noise-shaping coder topology for 15+ bit converters

Media and tip trajectory optimization for high-density MFM-based perpendicular recording

KOAN/ANAGRAM II: new tools for device-level analog placement and routing

A low-power backward equalizer for DFE read-channel applications

An 85 mW, 10 b, 40 Msample/s CMOS parallel-pipelined ADC

Adaptive continuous-time equalization followed by FDTS/DF sequence detection

Performance analysis of a 0.3-Tb/in(2) low-power MFM-based scanning-probe device

System design considerations for MEMS-actuated magnetic-probe-based mass storage

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