UB Paderborn / Katalog / Suche / in CDI

Sortiert nach

Einfacher Volltextzugriff von (fast) überall

Installieren Sie die LibKey Nomad-Browsererweiterung und erhalten Sie von vielen Webseiten einfachen Zugriff auf lizenzierte Volltexte oder Open Access Publikationen. Mehr erfahren...

Categorization and Characterization of Time Domain CMOS Temperature Sensors

Sensors (Basel, Switzerland), 2020-11, Vol.20 (22), p.6700

Byun, Sangjin

2020

Volltextzugriff (PDF)

Design of an Integrated Near-Infrared Spectroscopy Module for Sugar Content Estimation of Apples

Micromachines (Basel), 2022-03, Vol.13 (4), p.519

Byun, Sangjin

2022

Volltextzugriff (PDF)

A 400 Mb/s∼2.5 Gb/s Referenceless CDR IC Using Intrinsic Frequency Detection Capability of Half-Rate Linear Phase Detector

IEEE transactions on circuits and systems. I, Regular papers, 2016-10, Vol.63 (10), p.1592-1604

Byun, Sangjin

2016

Volltextzugriff (PDF)

Analysis and Design of CMOS Received Signal Strength Indicator

IEEE transactions on circuits and systems. I, Regular papers, 2014-10, Vol.61 (10), p.2970-2977

Byun, Sangjin

2014

Volltextzugriff (PDF)

Analysis and Verification of DLL-Based GFSK Demodulator Using Multiple-IF-Period Delay Line

IEEE transactions on circuits and systems. II, Express briefs, 2017-01, Vol.64 (1), p.6-10

Byun, Sangjin

2017

Volltextzugriff (PDF)

A Poly Resistor Based Time Domain CMOS Temperature Sensor with 9b SAR and Fine Delay Line

Sensors (Basel, Switzerland), 2020-04, Vol.20 (7), p.2053

2020

Volltextzugriff (PDF)

Closed-Form Equation of Data Dependent Jitter in First Order Low Pass System

TheScientificWorld, 2014, Vol.2014 (2014), p.1-11

2014

Volltextzugriff (PDF)

A 0.026 mm2 Time Domain CMOS Temperature Sensor with Simple Current Source

Micromachines (Basel), 2020-09, Vol.11 (10), p.899

2020

Volltextzugriff (PDF)

Analysis and Design of a 970-MHz, 108-Stage CMOS Ambient RF Energy Harvester With −36.5-dBm Input Power Sensitivity

IEEE transactions on microwave theory and techniques, 2024-06, Vol.72 (6), p.3829-3840

2024

Volltextzugriff (PDF)

Analysis and Design of a 570-Stage CMOS RF-DC Rectifier With Ground Shielded Input Coupling Capacitors

IEEE transactions on circuits and systems. I, Regular papers, 2024-08, p.1-12

2024

Volltextzugriff (PDF)

A 82.5% Power Efficiency at 1.2 mW Buck Converter with Sleep Control

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2016, 16(6), 72, pp.842-846

2016

Volltextzugriff (PDF)

An 884MHz, −41.8dBm Input Power Sensitivity, 570-Stage CMOS RF-DC Rectifier With Ground Shielded Input Coupling Capacitors

2024 IEEE International Symposium on Circuits and Systems (ISCAS), 2024, p.1-5

2024

Volltextzugriff (PDF)

More Discussions on Intrinsic Frequency Detection Capability of Full-Rate Linear Phase Detector in Clock and Data Recovery

Electronics (Basel), 2018-06, Vol.7 (6), p.93

Byun, Sangjin

2018

Volltextzugriff (PDF)

0.97 mW/Gb/s, 4 Gb/s CMOS clock and data recovery IC with dynamic voltage scaling

IET circuits, devices & systems, 2016-05, Vol.10 (3), p.220-228

Byun, Sangjin

2016

Volltextzugriff (PDF)

A 10-Gb/s CMOS CDR and DEMUX IC With a Quarter-Rate Linear Phase Detector

IEEE journal of solid-state circuits, 2006-11, Vol.41 (11), p.2566-2576

2006

Volltextzugriff (PDF)

On Frequency Detection Capability of Full-Rate Linear and Binary Phase Detectors

IEEE transactions on circuits and systems. II, Express briefs, 2017-07, Vol.64 (7), p.757-761

2017

Volltextzugriff (PDF)

1∼3 GHz VCO with rail-to-rail VCONT range

IEICE Electronics Express, 2016, Vol.13 (11), p.20160373-20160373

Byun, Sangjin

2016

Volltextzugriff (PDF)

A low-power CMOS Bluetooth RF transceiver with a digital offset canceling DLL-based GFSK demodulator

IEEE journal of solid-state circuits, 2003-10, Vol.38 (10), p.1609-1618

2003

Volltextzugriff (PDF)

A four-channel 3.125-Gb/s/ch CMOS serial-link transceiver with a mixed-mode adaptive equalizer

IEEE journal of solid-state circuits, 2005-02, Vol.40 (2), p.462-471

2005

Volltextzugriff (PDF)

A 20 Gb/s 1:4 DEMUX Without Inductors and Low-Power Divide-by-2 Circuit in 0.13 \mu} CMOS Technology

IEEE journal of solid-state circuits, 2008-02, Vol.43 (2), p.541-549

2008

Volltextzugriff (PDF)

A 82.5% Power Efficiency at 1.2 mW Buck Converter with Sleep Control

Journal of semiconductor technology and science, 2016, Vol.16 (6), p.842-846

2016

Volltextzugriff (PDF)

A 600MHz CMOS OFDM LINC transmitter with a 7 bit digital phase modulator

2008 IEEE Radio Frequency Integrated Circuits Symposium, 2008, p.677-680

2008

Volltextzugriff (PDF)

A self-calibrated LC quadrature VCO in a current-limited region

2008 IEEE Radio Frequency Integrated Circuits Symposium, 2008, p.379-382

2008

Volltextzugriff (PDF)

A low-power 10-Gb/s 0.13-μm CMOS transmitter for OC-192/STM-64 applications

2007 50th Midwest Symposium on Circuits and Systems, 2007, p.1165-1168

2007

Volltextzugriff (PDF)

Charge Pump circuit with wide range digital leakage current mismatch compensator

IEICE Electronics Express, 2010-01, Vol.7 (23), p.1709-1713

2010

Volltextzugriff (PDF)

1 – 25 von 51

Menü

Weitere Dienste

Einstellungen

Categorization and Characterization of Time Domain CMOS Temperature Sensors

Design of an Integrated Near-Infrared Spectroscopy Module for Sugar Content Estimation of Apples

A 400 Mb/s∼2.5 Gb/s Referenceless CDR IC Using Intrinsic Frequency Detection Capability of Half-Rate Linear Phase Detector

Analysis and Design of CMOS Received Signal Strength Indicator

Analysis and Verification of DLL-Based GFSK Demodulator Using Multiple-IF-Period Delay Line

A Poly Resistor Based Time Domain CMOS Temperature Sensor with 9b SAR and Fine Delay Line

Closed-Form Equation of Data Dependent Jitter in First Order Low Pass System

A 0.026 mm2 Time Domain CMOS Temperature Sensor with Simple Current Source

Analysis and Design of a 970-MHz, 108-Stage CMOS Ambient RF Energy Harvester With −36.5-dBm Input Power Sensitivity

Analysis and Design of a 570-Stage CMOS RF-DC Rectifier With Ground Shielded Input Coupling Capacitors

A 82.5% Power Efficiency at 1.2 mW Buck Converter with Sleep Control

An 884MHz, −41.8dBm Input Power Sensitivity, 570-Stage CMOS RF-DC Rectifier With Ground Shielded Input Coupling Capacitors

More Discussions on Intrinsic Frequency Detection Capability of Full-Rate Linear Phase Detector in Clock and Data Recovery

0.97 mW/Gb/s, 4 Gb/s CMOS clock and data recovery IC with dynamic voltage scaling

A 10-Gb/s CMOS CDR and DEMUX IC With a Quarter-Rate Linear Phase Detector

On Frequency Detection Capability of Full-Rate Linear and Binary Phase Detectors

1∼3 GHz VCO with rail-to-rail VCONT range

A low-power CMOS Bluetooth RF transceiver with a digital offset canceling DLL-based GFSK demodulator

A four-channel 3.125-Gb/s/ch CMOS serial-link transceiver with a mixed-mode adaptive equalizer

A 20 Gb/s 1:4 DEMUX Without Inductors and Low-Power Divide-by-2 Circuit in 0.13 \mu} CMOS Technology

A 82.5% Power Efficiency at 1.2 mW Buck Converter with Sleep Control

A 600MHz CMOS OFDM LINC transmitter with a 7 bit digital phase modulator

A self-calibrated LC quadrature VCO in a current-limited region

A low-power 10-Gb/s 0.13-μm CMOS transmitter for OC-192/STM-64 applications

Charge Pump circuit with wide range digital leakage current mismatch compensator

Suchergebnisse filtern