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General framework about defect creation at the Si∕SiO2 interface

Journal of applied physics, 2009-06, Vol.105 (11)

2009

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CMOS Scaling Challenges for High Performance and Low Power applications facing Reliability Criteria towards the Decananometer range

Journal of physics. Conference series, 2023-07, Vol.2548 (1), p.12003

2023

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Analysis of the interactions of HCD under "On" and "Off" state modes for 28nm FDSOI AC RF modelling

2021 IEEE International Reliability Physics Symposium (IRPS), 2021, p.1-5

2021

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Modulation Of HCI in I/O analog devices Through Process Specifications

2023 IEEE International Integrated Reliability Workshop (IIRW), 2023, p.1-8

2023

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Microscopic scale characterization and modeling of transistor degradation under HC stress

Microelectronics and reliability, 2012-11, Vol.52 (11), p.2513-2520

2012

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Device Reliability to Circuit Qualification: Insights and Challenges

2022 IEEE International Integrated Reliability Workshop (IIRW), 2022, p.1-7

2022

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A thorough investigation of MOSFETs NBTI degradation

Microelectronics and reliability, 2005, Vol.45 (1), p.83-98

2005

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Hot-Carrier acceleration factors for low power management in DC-AC stressed 40nm NMOS node at high temperature

2009 IEEE International Reliability Physics Symposium, 2009, p.531-548

2009

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From defects creation to circuit reliability – A bottom-up approach (invited)

Microelectronic engineering, 2011-07, Vol.88 (7), p.1396-1407

2011

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DC to AC analysis of HC vs. BTI damage in N-EDMOS used in single photon avalanche diode cell

Microelectronics and reliability, 2023-11, Vol.150, p.115111, Article 115111

2023

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Modeling hot carrier damage interaction between on and off modes for 28 nm AC RF applications

Microelectronics and reliability, 2021-11, Vol.126, p.114342, Article 114342

2021

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Analysis of deep submicron VLSI technological risks: A new qualification process for professional electronics

Microelectronics and reliability, 2009-09, Vol.49 (9), p.1381-1385

2009

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New Hot Carrier degradation modeling reconsidering the role of EES in ultra short N-channel MOSFETs

2013 IEEE International Reliability Physics Symposium (IRPS), 2013, p.XT.1.1-XT.1.5

2013

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Hot-carrier damage from high to low voltage using the energy-driven framework

Microelectronic engineering, 2007-09, Vol.84 (9), p.1938-1942

2007

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HCI degradation model based on the diffusion equation including the MVHR model

Microelectronic engineering, 2007-09, Vol.84 (9), p.1921-1924

2007

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Designing in reliability in advanced CMOS technologies

Microelectronics and reliability, 2006-09, Vol.46 (9), p.1464-1471

2006

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Degradation mechanism understanding of NLDEMOS SOI in RF applications

Microelectronics and reliability, 2007-09, Vol.47 (9), p.1634-1638

2007

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Enabling robust automotive electronic components in advanced CMOS nodes

Microelectronics and reliability, 2017-09, Vol.76-77, p.13-24

2017

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Deep hole trapping effects in the degradation mechanisms of 6.5–2 nm thick gate-oxide PMOSFETs

Microelectronic engineering, 2004-04, Vol.72 (1), p.106-111

2004

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Experimental extraction of degradation parameters after constant voltage stress and substrate hot electron injection on ultrathin oxides

Microelectronics and reliability, 2005-05, Vol.45 (5), p.883-886

2005

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Performance vs. reliability adaptive body bias scheme in 28 nm 8214 nm UTBB FDSOI nodes

Microelectronics and reliability, 2016-09, Vol.64 (SI), p.158-162

2016

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Hole injection enhanced hot-carrier degradation in PMOSFETs used for systems on chip applications with 6.5–2 nm thick gate-oxides

Microelectronics and reliability, 2004, Vol.44 (1), p.65-77

2004

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Multiple microscopic defects characterization methods to improve macroscopic degradation modeling of MOSFETs

2010 IEEE International Integrated Reliability Workshop Final Report, 2010, p.61-66

2010

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Hot-carrier reliability of 20V MOS transistors in 0.13 μm CMOS technology

Microelectronics and reliability, 2005-09, Vol.45 (9), p.1349-1354

2005

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Off state incorporation into the 3 energy mode device lifetime modeling for advanced 40nm CMOS node

2010 IEEE International Reliability Physics Symposium, 2010, p.55-64

2010

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General framework about defect creation at the Si∕SiO2 interface

CMOS Scaling Challenges for High Performance and Low Power applications facing Reliability Criteria towards the Decananometer range

Analysis of the interactions of HCD under "On" and "Off" state modes for 28nm FDSOI AC RF modelling

Modulation Of HCI in I/O analog devices Through Process Specifications

Microscopic scale characterization and modeling of transistor degradation under HC stress

Device Reliability to Circuit Qualification: Insights and Challenges

A thorough investigation of MOSFETs NBTI degradation

Hot-Carrier acceleration factors for low power management in DC-AC stressed 40nm NMOS node at high temperature

From defects creation to circuit reliability – A bottom-up approach (invited)

DC to AC analysis of HC vs. BTI damage in N-EDMOS used in single photon avalanche diode cell

Modeling hot carrier damage interaction between on and off modes for 28 nm AC RF applications

Analysis of deep submicron VLSI technological risks: A new qualification process for professional electronics

New Hot Carrier degradation modeling reconsidering the role of EES in ultra short N-channel MOSFETs

Hot-carrier damage from high to low voltage using the energy-driven framework

HCI degradation model based on the diffusion equation including the MVHR model

Designing in reliability in advanced CMOS technologies

Degradation mechanism understanding of NLDEMOS SOI in RF applications

Enabling robust automotive electronic components in advanced CMOS nodes

Deep hole trapping effects in the degradation mechanisms of 6.5–2 nm thick gate-oxide PMOSFETs

Experimental extraction of degradation parameters after constant voltage stress and substrate hot electron injection on ultrathin oxides

Performance vs. reliability adaptive body bias scheme in 28 nm 8214 nm UTBB FDSOI nodes

Hole injection enhanced hot-carrier degradation in PMOSFETs used for systems on chip applications with 6.5–2 nm thick gate-oxides

Multiple microscopic defects characterization methods to improve macroscopic degradation modeling of MOSFETs

Hot-carrier reliability of 20V MOS transistors in 0.13 μm CMOS technology

Off state incorporation into the 3 energy mode device lifetime modeling for advanced 40nm CMOS node

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