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NoC synthesis flow for customized domain specific multiprocessor systems-on-chip

IEEE transactions on parallel and distributed systems, 2005-02, Vol.16 (2), p.113-129

2005

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Error control schemes for on-chip communication links: the energy-reliability tradeoff

IEEE transactions on computer-aided design of integrated circuits and systems, 2005-06, Vol.24 (6), p.818-831

2005

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Efficient implementation of distributed routing algorithms for NoCs

IET computers & digital techniques, 2009-09, Vol.3 (5), p.460-475

2009

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SystemC cosimulation and emulation of multiprocessor SoC designs

Computer (Long Beach, Calif.), 2003-04, Vol.36 (4), p.53-59

2003

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Analyzing on-chip communication in a MPSoC environment

Proceedings Design, Automation and Test in Europe Conference and Exhibition, 2004, Vol.2, p.752-757 Vol.2

2004

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Variability compensation for full-swing against low-swing on-chip communication

IET computers & digital techniques, 2011-09, Vol.5 (5), p.355-365

2011

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Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms

IEEE transactions on computer-aided design of integrated circuits and systems, 2009-03, Vol.28 (3), p.378-391

2009

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Low power error resilient encoding for on-chip data buses

Design, Automation, and Test in Europe: Proceedings of the conference on Design, automation and test in Europe; 04-08 Mar. 2002, 2002, p.102-109

2002

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Exploring Software Models for the Resilience Analysis of Deep Learning Accelerators: the NVDLA Case Study

2022 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS), 2022, p.142-147

2022

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Un trésor à l'Université d'Avignon: La pharmacie de l'Hôpital Sainte-Marthe

2018

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Integrated Optical Phased Arrays for on-Chip Communication

2023 23rd International Conference on Transparent Optical Networks (ICTON), 2023, p.1-4

2023

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Comparative Analysis and Optimization of the SystemC-AMS Analog Simulation Efficiency of Resistive Crossbar Arrays

2021 XXXVI Conference on Design of Circuits and Integrated Systems (DCIS), 2021, p.1-6

2021

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Supporting Task Migration in Multi-Processor Systems-on-Chip: A Feasibility Study

Proceedings of the Design Automation & Test in Europe Conference, 2006, Vol.1, p.1-6

2006

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Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems

IEEE transactions on computer-aided design of integrated circuits and systems, 2011-04, Vol.30 (4), p.534-547

2011

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Application-specific power-aware workload allocation for voltage scalable MPSoC platforms

2005 International Conference on Computer Design, 2005, p.87-93

2005

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Power aware network interface management for streaming multimedia

2002 IEEE Wireless Communications and Networking Conference Record. WCNC 2002 (Cat. No.02TH8609), 2002, Vol.2, p.926-930 vol.2

2002

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Network-on-chip architectures and design methods

IEE proceedings. Computers and digital techniques, 2005-03, Vol.152 (2), p.261

2005

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Trigger Site Inactivation for the Surgical Therapy of Occipital Migraine and Tension-type Headache: Our Experience and Review of the Literature

Plastic and reconstructive surgery. Global open, 2019-11, Vol.7 (11), p.e2507-e2507

2019

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Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing

2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 2010, p.25-32

2010

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A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories

2012 Design, Automation & Test in Europe Conference & Exhibition (DATE), 2012, p.881-886

2012

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Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support

IEEE transactions on computers, 2007-05, Vol.56 (5), p.606-621, Article 606

2007

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HIV prevention transformed: the new prevention research agenda

The Lancet (British edition), 2011-07, Vol.378 (9787), p.269-278

2011

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Improved Utilization of NoC Channel Bandwidth by Switch Replication for Cost-Effective Multi-processor Systems-on-Chip

2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 2010, p.165-172

2010

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A retrospective look at xpipes: The exciting ride from a design experience to a design platform for nanoscale networks-on-chip

2012 IEEE 30th International Conference on Computer Design (ICCD), 2012, p.43-44

2012

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A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories

Proceedings of the Conference on Design, Automation and Test in Europe, 2012, p.881-886

2012

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NoC synthesis flow for customized domain specific multiprocessor systems-on-chip

Error control schemes for on-chip communication links: the energy-reliability tradeoff

Efficient implementation of distributed routing algorithms for NoCs

SystemC cosimulation and emulation of multiprocessor SoC designs

Analyzing on-chip communication in a MPSoC environment

Variability compensation for full-swing against low-swing on-chip communication

Reducing the Abstraction and Optimality Gaps in the Allocation and Scheduling for Variable Voltage/Frequency MPSoC Platforms

Low power error resilient encoding for on-chip data buses

Exploring Software Models for the Resilience Analysis of Deep Learning Accelerators: the NVDLA Case Study

Un trésor à l'Université d'Avignon: La pharmacie de l'Hôpital Sainte-Marthe

Integrated Optical Phased Arrays for on-Chip Communication

Comparative Analysis and Optimization of the SystemC-AMS Analog Simulation Efficiency of Resistive Crossbar Arrays

Supporting Task Migration in Multi-Processor Systems-on-Chip: A Feasibility Study

Cost-Efficient On-Chip Routing Implementations for CMP and MPSoC Systems

Application-specific power-aware workload allocation for voltage scalable MPSoC platforms

Power aware network interface management for streaming multimedia

Network-on-chip architectures and design methods

Trigger Site Inactivation for the Surgical Therapy of Occipital Migraine and Tension-type Headache: Our Experience and Review of the Literature

Addressing Manufacturing Challenges with Cost-Efficient Fault Tolerant Routing

A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories

Energy-Efficient Multiprocessor Systems-on-Chip for Embedded Computing: Exploring Programming Models and Their Architectural Support

HIV prevention transformed: the new prevention research agenda

Improved Utilization of NoC Channel Bandwidth by Switch Replication for Cost-Effective Multi-processor Systems-on-Chip

A retrospective look at xpipes: The exciting ride from a design experience to a design platform for nanoscale networks-on-chip

A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories

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