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3-D Sidewall Interconnect Formation Climbing Over Self-Assembled KGDs for Large-Area Heterogeneous Integration
IEEE transactions on electron devices, 2017-07, Vol.64 (7), p.2912-2918
2017
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Mechanical Characteristics of Thin Die/Wafers in Three-Dimensional Large-Scale Integrated Systems
IEEE transactions on semiconductor manufacturing, 2014-08, Vol.27 (3), p.341-346
2014
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Multichip Self-Assembly Technology for Advanced Die-to-Wafer 3-D Integration to Precisely Align Known Good Dies in Batch Processing
IEEE transactions on components, packaging, and manufacturing technology (2011), 2011-12, Vol.1 (12), p.1873-1884
2011
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Reconfigured-Wafer-to-Wafer 3-D Integration Using Parallel Self-Assembly of Chips With Cu-SnAg Microbumps and a Nonconductive Film
IEEE transactions on electron devices, 2014-02, Vol.61 (2), p.533-539
2014
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Multichip-to-Wafer Three-Dimensional Integration Technology Using Chip Self-Assembly With Excimer Lamp Irradiation
IEEE transactions on electron devices, 2012-11, Vol.59 (11), p.2956-2963
2012
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Multichip Self-Assembly Technology for Advanced Die-to-Wafer 3-D Integration to Precisely Align Known Good Dies in Batch Processing : Best-of-Session Papers from the 60th Electronic Components and Technology Conference
IEEE transactions on components, packaging, and manufacturing technology (2011), 2011, Vol.1 (11-12), p.1873-1884
2011
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Integration of Damage-less Probe Cards Using Nano-TSV Technology for Microbumped Wafer Testing
2021 IEEE International 3D Systems Integration Conference (3DIC), 2021, p.1-4
2021
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New concept of TSV formation methodology using Directed Self-Assembly (DSA)
2016 IEEE International 3D Systems Integration Conference (3DIC), 2016, p.1-4
2016
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Challenges of high-robustness self-assembly with Cu/Sn-Ag microbump bonding for die-to-wafer 3D integration
2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 2015, p.342-347
2015
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Transfer and non-transfer stacking technologies based on chip-to-wafer self-asembly for high-throughput and high-precision alignment and microbump bonding
2015 International 3D Systems Integration Conference (3DIC), 2015, p.TS7.4.1-TS7.4.4
2015
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Through Silicon photonic via (TSPV) with Si core for low loss and high-speed data transmission in opto-electronic 3-D LSI
2010 IEEE International 3D Systems Integration Conference (3DIC), 2010, p.1-4
2010
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Impact of microbump induced stress in thinned 3D-LSIs after wafer bonding
2010 IEEE International 3D Systems Integration Conference (3DIC), 2010, p.1-5
2010
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10 µm fine pitch Cu/Sn micro-bumps for 3-D super-chip stack
2009 IEEE International Conference on 3D System Integration, 2009, p.1-6
2009
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