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Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design, 2002, p.317-322

2002

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Experimental study for selection of electrode material for ZnO-based memristors

Design of large dynamic range, low-power, high-precision ROIC for quantum dot infrared photo-detector

A Novel and Robust Approach for Common Mode Feedback Using IDDG FinFET

A Sub-1V 32nA Process, Voltage and Temperature Invariant Voltage Reference Circuit

A Feed-Forward Equalizer for Capacitively Coupled On-Chip Interconnect

Modeling and Design of EMI-Immune OpAmps in 0.18- \mu m CMOS Technology

Analytical and Experimental Validation of Robustness of the Current Mirrors to EMI

A Generic EMI-Immune Technique for Differential Amplifiers With Single-Ended Output

Toward System on Chip (SoC) Development Using FinFET Technology: Challenges, Solutions, Process Co-Development & Optimization Guidelines

Part I: On the Behavior of STI-Type DeNMOS Device Under ESD Conditions

Part II: On the Three-Dimensional Filamentation and Failure Modeling of STI Type DeNMOS Device Under Various ESD Conditions

A highly EMI-immune folded cascode OpAmp in 0.18 μm CMOS technology

Design of large dynamic range, low-power, high-precision ROIC for quantum dot infrared photo-detector

A balanced CMOS OpAmp with high EMI immunity

Freeze-thaw performance of base course treated with carboxylated styrene-butadiene emulsion-Portland cement

Current Excitation Method for \Delta Measurement in Piezo-Resistive Sensors With a 0.3-ppm Resolution

A process and temperature invariant on-chip resistor and its application

An ultra low-energy DAC for successive approximation ADCs

An Integrated CMOS RF Energy Harvester with Differential Microstrip Antenna and On-Chip Charger

On the failure mechanism and current instabilities in RESURF type DeNMOS device under ESD conditions

Low power current mode receiver with inductive input impedance

A robust CMOS miller OpAmp with high EMI-immunity

An EMI Immune PAM4 Transmitter in 130 nm BiCMOS Technology

Modeling and design of an EMI-immune source-buffered Miller OpAmp in 0.18 μm CMOS technology

Impact of technology scaling on metastability performance of CMOS synchronizing latches

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