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Physical and electrical characteristics of GexSb100−x films for use as phase-change materials

Thin solid films, 2018-08, Vol.659, p.1-6

2018

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Size and Shape Effect of SiC Source/Drain on Strained Si

Journal of nanoscience and nanotechnology, 2014-10, Vol.14 (10), p.7679-7682

2014

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Strain measurement in FinFET structures with epitaxially grown SiGe on source/drain region by nano beam diffraction (NBD) method

Microscopy and microanalysis, 2013-08, Vol.19 (S2), p.732-733

2013

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An insulated gate bipolar transistor employing the plugged n + anode

Microelectronics and reliability, 1999, Vol.39 (1), p.29-33

1999

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The separated shorted-anode insulated gate bipolar transistor with the suppressed negative differential resistance regime

Microelectronics, 1999-06, Vol.30 (6), p.571-575

1999

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Dual-gate shorted anode SOI lateral insulated gate bipolar transistor suppressing the snap-back

Japanese Journal of Applied Physics, 1997-03, Vol.36 (3B), p.1663-1666

1997

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A dual-gate shorted-anode silicon-on-insulator lateral insulated gate bipolar transistor with floating ohmic contact for suppressing snapback and fast switching characteristics

Microelectronics, 1999-06, Vol.30 (6), p.577-581

1999

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The Closed-Form Solutions For The Breakdown Voltages Of 6H-SiC Reachthrough Diodes

MRS proceedings, 1998, Vol.512, Article 143

1998

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A base resistance controlled thyristor with the self-align corrugated p-base

Proceedings of the 10th International Symposium on Power Semiconductor Devices and ICs. ISPSD'98 (IEEE Cat. No.98CH36212), 1998, p.209-212

1998

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A 90-nm CMOS 1.8-V 2-Gb NAND flash memory for mass storage applications

IEEE journal of solid-state circuits, 2003-11, Vol.38 (11), p.1934-1942

2003

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High-performance 1-Gb-NAND flash memory with 0.12-μm technology

IEEE journal of solid-state circuits, 2002-11, Vol.37 (11), p.1502-1509

2002

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A new gradual hole injection dual-gate LIGBT

IEEE electron device letters, 1998-12, Vol.19 (12), p.490-492

1998

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Insulated gate bipolar transistor employing the plugged n super(+) anode

Microelectronics and reliability, 1999-01, Vol.39 (1), p.29-33

1999

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CB-BRT: a new base resistance-controlled thyristor employing a self-aligned corrugated p-base

IEEE electron device letters, 1998-12, Vol.19 (12), p.493-495

1998

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A 3.3V 4Gb four-level NAND flash memory with 90nm CMOS technology

First edition, 2004

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EFFECT OF N2 GAS DOPING ON Sb2Te3 THIN FILMS FOR PRAM RECORDING LAYER

Hanʼguk Seramik Hakhoe chi, 2008-01, Vol.45 (5), p.276-279

2008

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Dual-gate shorted-anode LIGBT with p/sup +/ injector eliminating the negative resistance regime

Proceedings of the 10th International Symposium on Power Semiconductor Devices and ICs. ISPSD'98 (IEEE Cat. No.98CH36212), 1998, p.269-272

1998

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Optimum design of the field plate in the cylindrical p +n junction: analytical approach

Solid-state electronics, 1998-09, Vol.42 (9), p.1651-1655

1998

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Lateral dual channel emitter switched thyristor employing segmented p-base

11th International Symposium on Power Semiconductor Devices and ICs. ISPSD'99 Proceedings (Cat. No.99CH36312), 1999, p.213-216

1999

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A New Lateral Dual-Gate Thyristor with Current Saturation

Japanese Journal of Applied Physics, 2000-04, Vol.39 (4S), p.1979

2000

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A lateral trench-MOS bipolar-mode FET on silicon-on-insulator

Physica scripta, 1999-01, Vol.1999 (1), p.307

1999

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The maximum controllable current of emitter switched thyristors employing the segmented p-base

Physica scripta, 1999-01, Vol.1999 (1), p.294

1999

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A trench-gate silicon-on-insulator lateral insulated gate bipolar transistor with the p+ cathode well

Japanese Journal of Applied Physics, 1995-02, Vol.34 (2B), p.854-859

1995

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The breakdown voltage of negative curvatured p+n diodes using a SOI layer

Solid-state electronics, 1997-05, Vol.41 (5), p.787-788

1997

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A lateral SOI BMFET with high current gain

Proceedings of International Symposium on Power Semiconductor Devices and IC's: ISPSD '95, 1995, p.288-292

1995

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Physical and electrical characteristics of GexSb100−x films for use as phase-change materials

Size and Shape Effect of SiC Source/Drain on Strained Si

Strain measurement in FinFET structures with epitaxially grown SiGe on source/drain region by nano beam diffraction (NBD) method

An insulated gate bipolar transistor employing the plugged n + anode

The separated shorted-anode insulated gate bipolar transistor with the suppressed negative differential resistance regime

Dual-gate shorted anode SOI lateral insulated gate bipolar transistor suppressing the snap-back

A dual-gate shorted-anode silicon-on-insulator lateral insulated gate bipolar transistor with floating ohmic contact for suppressing snapback and fast switching characteristics

The Closed-Form Solutions For The Breakdown Voltages Of 6H-SiC Reachthrough Diodes

A base resistance controlled thyristor with the self-align corrugated p-base

A 90-nm CMOS 1.8-V 2-Gb NAND flash memory for mass storage applications

High-performance 1-Gb-NAND flash memory with 0.12-μm technology

A new gradual hole injection dual-gate LIGBT

Insulated gate bipolar transistor employing the plugged n super(+) anode

CB-BRT: a new base resistance-controlled thyristor employing a self-aligned corrugated p-base

A 3.3V 4Gb four-level NAND flash memory with 90nm CMOS technology

EFFECT OF N2 GAS DOPING ON Sb2Te3 THIN FILMS FOR PRAM RECORDING LAYER

Dual-gate shorted-anode LIGBT with p/sup +/ injector eliminating the negative resistance regime

Optimum design of the field plate in the cylindrical p +n junction: analytical approach

Lateral dual channel emitter switched thyristor employing segmented p-base

A New Lateral Dual-Gate Thyristor with Current Saturation

A lateral trench-MOS bipolar-mode FET on silicon-on-insulator

The maximum controllable current of emitter switched thyristors employing the segmented p-base

A trench-gate silicon-on-insulator lateral insulated gate bipolar transistor with the p+ cathode well

The breakdown voltage of negative curvatured p+n diodes using a SOI layer

A lateral SOI BMFET with high current gain

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