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3.125 Gbit/s CMOS transceiver for duobinary modulation over 50-m SI-POF channels

Electronics letters, 2017-02, Vol.53 (4), p.258-260

2017

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An Adaptive Bitrate Clock and Data Recovery Circuit for Communication Signal Analyzers

IEEE transactions on instrumentation and measurement, 2017-01, Vol.66 (1), p.191-193

2017

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A methodology to design continuous‐time adaptive equalizers

International journal of circuit theory and applications, 2017-09, Vol.45 (9), p.1203-1217

2017

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Analysis of mismatch impact on image rejection ratio for passive polyphase filters

International journal of circuit theory and applications, 2018-10, Vol.46 (10), p.1838-1847

2018

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Power comparator for continuous-time adaptive equalization in Ethernet-based instrumentation

Measurement science & technology, 2014-08, Vol.25 (8), p.87002-4

2014

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A 0.18 μm CMOS ring VCO for clock and data recovery applications

Microelectronics and reliability, 2011-12, Vol.51 (12), p.2351-2356

2011

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High-resolution wide-band LC-VCO for reliable operation in phase-locked loops

Microelectronics and reliability, 2016-08, Vol.63, p.251-255

2016

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Multi-Rate Adaptive Equalizer for Transmission Over Up to 50-m SI-POF

IEEE photonics technology letters, 2017-04, Vol.29 (7), p.587-590

2017

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1-V continuous-time equalizers for multi-gigabit short-haul optical fiber communications

International journal of circuit theory and applications, 2014-02, Vol.42 (2), p.146-164

2014

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A new simple technique for improving the random properties of chaos-based cryptosystems

AIP advances, 2018-03, Vol.8 (3), p.035004-035004-10

2018

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ICT-Based Didactic Strategies to Build Knowledge Models in Electronics in Higher Education

2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, p.1-5

2019

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A 2.5-Gb/s multi-rate continuous-time adaptive equalizer for short reach optical links

ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC), 2015, p.44-47

2015

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Security Analysis of a New FPE Stream Cipher

2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, p.1-5

2020

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A New Technique For Improving the Security of Chaos Based Cryptosystems

2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, p.1-5

2018

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Sensor-Based Seeds for a Chaotic Stream Cipher

Procedia engineering, 2016, Vol.168, p.1663-1666

2016

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Using a Chaotic Cipher to Encrypt Ethernet Traffic

2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, p.1-5

2018

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Low-EVM CMOS Transimpedance Amplifier for Intermediate Frequency over Fiber

2018 IEEE International Symposium on Circuits and Systems (ISCAS), 2018, p.1-4

2018

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HLA-DRB1: genetic susceptibility and disability progression in a Spanish multiple sclerosis population

European journal of neurology, 2011-02, Vol.18 (2), p.337-342

2011

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A 1.7-GHz wide-band CMOS LC-VCO with 7-Bit coarse control

2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, p.3060-3063

2015

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Washing of cord blood grafts after thawing: high cell recovery using an automated and closed system

Vox sanguinis, 2004-10, Vol.87 (3), p.165-172

2004

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1-V continuous-time linear equalizer for up to 2 Gb/s over 50-m SI-POF

2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, p.1818-1821

2015

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A CMOS 4-bit Digitally Programmable Phase Shifter for the K-band

2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC), 2022, p.1-2

2022

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Factors modulating circulation of hematopoietic progenitor cells in cord blood and neonates

Cytotherapy (Oxford, England), 2009, Vol.11 (1), p.35-42

2009

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A 18-27 GHz Programmable Gain Amplifier in 65-nm CMOS technology

2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC), 2022, p.1-2

2022

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Programmable delay lines on different LUT implementations for CRO-PUF

2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME), 2022, p.357-360

2022

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3.125 Gbit/s CMOS transceiver for duobinary modulation over 50-m SI-POF channels

An Adaptive Bitrate Clock and Data Recovery Circuit for Communication Signal Analyzers

A methodology to design continuous‐time adaptive equalizers

Analysis of mismatch impact on image rejection ratio for passive polyphase filters

Power comparator for continuous-time adaptive equalization in Ethernet-based instrumentation

A 0.18 μm CMOS ring VCO for clock and data recovery applications

High-resolution wide-band LC-VCO for reliable operation in phase-locked loops

Multi-Rate Adaptive Equalizer for Transmission Over Up to 50-m SI-POF

1-V continuous-time equalizers for multi-gigabit short-haul optical fiber communications

A new simple technique for improving the random properties of chaos-based cryptosystems

ICT-Based Didactic Strategies to Build Knowledge Models in Electronics in Higher Education

A 2.5-Gb/s multi-rate continuous-time adaptive equalizer for short reach optical links

Security Analysis of a New FPE Stream Cipher

A New Technique For Improving the Security of Chaos Based Cryptosystems

Sensor-Based Seeds for a Chaotic Stream Cipher

Using a Chaotic Cipher to Encrypt Ethernet Traffic

Low-EVM CMOS Transimpedance Amplifier for Intermediate Frequency over Fiber

HLA-DRB1: genetic susceptibility and disability progression in a Spanish multiple sclerosis population

A 1.7-GHz wide-band CMOS LC-VCO with 7-Bit coarse control

Washing of cord blood grafts after thawing: high cell recovery using an automated and closed system

1-V continuous-time linear equalizer for up to 2 Gb/s over 50-m SI-POF

A CMOS 4-bit Digitally Programmable Phase Shifter for the K-band

Factors modulating circulation of hematopoietic progenitor cells in cord blood and neonates

A 18-27 GHz Programmable Gain Amplifier in 65-nm CMOS technology

Programmable delay lines on different LUT implementations for CRO-PUF

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