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Effects of cold and hot smoking processes and the addition of natural Dunaliella salina polyphenol extract on the biochemical quality and shelf life of Sander lucioperca fillets after storage for 90 days

Grasas y aceites (Sevilla), 2023-10, Vol.74 (4), p.e530

2023

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A Very High Throughput Deblocking Filter for H.264/AVC

Journal of signal processing systems, 2013-11, Vol.73 (2), p.189-199

2013

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An efficient FPGA implementation of AVMF filter using High-Level Synthesis

2020 20th International Conference on Sciences and Techniques of Automatic Control and Computer Engineering (STA), 2020, p.82-85

2020

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Complexity study of the Gamma correction method for text extraction from complex images

2015 16th International Conference on Sciences and Techniques of Automatic Control and Computer Engineering (STA), 2015, p.422-426

2015

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FPGA implementation of a HW/SW platform for multimedia embedded systems

Design automation for embedded systems, 2008-12, Vol.12 (4), p.293-311

2008

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Reduction of impulsive noise in colour image using an Adaptive Vector Distance Directional Filter

2016 2nd International Conference on Advanced Technologies for Signal and Image Processing (ATSIP), 2016, p.243-246

2016

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A new adaptive vector median rational hybrid filter for impulsive noise suppression

2015 16th International Conference on Sciences and Techniques of Automatic Control and Computer Engineering (STA), 2015, p.417-421

2015

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An efficient implementation of GLCM algorithm in FPGA

2018 International Conference on Internet of Things, Embedded Systems and Communications (IINTEC), 2018, p.147-152

2018

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Hardware implementation and validation of the fast variable block size motion estimation architecture for H.264/AVC

International journal of electronics and communications, 2012-08, Vol.66 (8), p.701-710

2012

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Advanced Design of TQ/IQT Component for H.264/AVC Based on SoPC Validation

WSEAS Transactions on circuits and systems, 2012-07, Vol.11 (7), p.211-223

2012

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FPGA DESIGN FOR H.264/AVC ENCODER

International journal of computer science, engineering and applications, 2011-10, Vol.1 (5), p.119-119

2011

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Communication, Signal Processing & Information Technology: Extended Papers

1, 2018

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Hardware architecture for H.264/AVC deblocking filter algorithm

2009 6th International Multi-Conference on Systems, Signals and Devices, 2009, p.1-6

2009

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An FPGA implementation of motion estimation algorithm for H.264/AVC

2010 5th International Symposium On I/V Communications and Mobile Network, 2010, p.1-4

2010

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A parallel hardware architecture of deblocking filter in H264/AVC

2010 9th International Symposium on Electronics and Telecommunications, 2010, p.341-344

2010

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An efficient hardware implementation of H.264 TQ/IQT module

2010 9th International Symposium on Electronics and Telecommunications, 2010, p.337-340

2010

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Impact of varying processor number for H264 in FPGA platform

2010 7th International Multi- Conference on Systems, Signals and Devices, 2010, p.1-5

2010

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HW/SW FPGA Architecture for a Flexible Motion Estimation

2007 14th IEEE International Conference on Electronics, Circuits and Systems, 2007, p.30-33

2007

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Hardware implementation of fast block matching algorithm in FPGA for H.264/AVC

2009 6th International Multi-Conference on Systems, Signals and Devices, 2009, p.1-4

2009

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Hardware implementation and experiment validation of the VDDRHF color image filter

2010 7th International Multi- Conference on Systems, Signals and Devices, 2010, p.1-4

2010

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FPGA implementation of vector directional distance filter

5th International Conference on Design & Technology of Integrated Systems in Nanoscale Era, 2010, p.1-4

2010

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Efficient Architecture and Implementation of Vector Median Filter in Co-Design Context

Radioengineering, 2007-09, Vol.16 (3), p.113-119

2007

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Hardware platform design for real-time video applications

Proceedings. The 16th International Conference on Microelectronics, 2004. ICM 2004, 2004, p.722-725

2004

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An Optimized Hardware Architecture of 4×4 Intra Prediction for HEVC Standard

Communication and Signal Processing, 2018, Vol.8, p.127-144

2018

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An FPGA Implementation of HW/SW Codesign Architecture for H.263 Video Coding

Atitallah, A. Ben

2011

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Effects of cold and hot smoking processes and the addition of natural Dunaliella salina polyphenol extract on the biochemical quality and shelf life of Sander lucioperca fillets after storage for 90 days

A Very High Throughput Deblocking Filter for H.264/AVC

An efficient FPGA implementation of AVMF filter using High-Level Synthesis

Complexity study of the Gamma correction method for text extraction from complex images

FPGA implementation of a HW/SW platform for multimedia embedded systems

Reduction of impulsive noise in colour image using an Adaptive Vector Distance Directional Filter

A new adaptive vector median rational hybrid filter for impulsive noise suppression

An efficient implementation of GLCM algorithm in FPGA

Hardware implementation and validation of the fast variable block size motion estimation architecture for H.264/AVC

Advanced Design of TQ/IQT Component for H.264/AVC Based on SoPC Validation

FPGA DESIGN FOR H.264/AVC ENCODER

Communication, Signal Processing & Information Technology: Extended Papers

Hardware architecture for H.264/AVC deblocking filter algorithm

An FPGA implementation of motion estimation algorithm for H.264/AVC

A parallel hardware architecture of deblocking filter in H264/AVC

An efficient hardware implementation of H.264 TQ/IQT module

Impact of varying processor number for H264 in FPGA platform

HW/SW FPGA Architecture for a Flexible Motion Estimation

Hardware implementation of fast block matching algorithm in FPGA for H.264/AVC

Hardware implementation and experiment validation of the VDDRHF color image filter

FPGA implementation of vector directional distance filter

Efficient Architecture and Implementation of Vector Median Filter in Co-Design Context

Hardware platform design for real-time video applications

An Optimized Hardware Architecture of 4×4 Intra Prediction for HEVC Standard

An FPGA Implementation of HW/SW Codesign Architecture for H.263 Video Coding

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