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Implementation of and Experimentation with Ground-Penetrating Radar for Real-Time Automatic Detection of Buried Improvised Explosive Devices

Sensors (Basel, Switzerland), 2022-11, Vol.22 (22), p.8710

2022

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Study of Through-Silicon-Via Impact on the 3-D Stacked IC Layout

IEEE transactions on very large scale integration (VLSI) systems, 2013-05, Vol.21 (5), p.862-874

2013

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Mapping the Physical and Dielectric Properties of Layered Soil Using Short-Time Matrix Pencil Method-Based Ground-Penetrating Radar

IEEE access, 2020, Vol.8, p.105610-105621

2020

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High Performance Application Specific Stream Architecture for Hardware Acceleration of HOG-SVM on FPGA

IEICE transactions on fundamentals of electronics, communications and computer sciences, 2019-12, Vol.E102.A (12), p.1792-1803

2019

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Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory)

IEEE transactions on computers, 2015-01, Vol.64 (1), p.112-125

2015

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Automatic Detection and Classification of Buried Objects Using Ground‐Penetrating Radar for Counter‐Improvised Explosive Devices

Radio science, 2018-02, Vol.53 (2), p.210-227

2018

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Exploiting Die-to-Die Thermal Coupling in 3-D IC Placement

IEEE transactions on very large scale integration (VLSI) systems, 2014-10, Vol.22 (10), p.2145-2155

2014

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Impact of Mechanical Stress on the Full Chip Timing for Through-Silicon-Via-based 3-D ICs

IEEE transactions on computer-aided design of integrated circuits and systems, 2013-06, Vol.32 (6), p.905-917

2013

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3D-MAPS: 3D Massively parallel processor with stacked memory

2012 IEEE International Solid-State Circuits Conference, 2012, p.188-190

2012

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Stress-driven 3D-IC placement with TSV keep-out zone and regularity study

2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2010, p.669-674

2010

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Fast bidirectional shortest path on GPU

IEICE Electronics Express, 2016, Vol.13 (6), p.20160036-20160036

2016

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TSV stress aware timing analysis with applications to 3D-IC layout optimization

Design Automation Conference, 2010, p.803-806

2010

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FMCW Radar-Based Enhancing Moving Target Positioning Accuracy in Spectrogram Mapping

2024 21st International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2024, p.1-4

2024

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A Surveillance System Utilizing mmWave-FMCW Radar for Restricted Control Area

2024 21st International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2024, p.1-4

2024

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Exploiting die-to-die thermal coupling in 3D IC placement

DAC Design Automation Conference 2012, 2012, p.741-746

2012

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Placement for fast and reliable through-silicon-via (TSV) based 3D-IC layouts

Athikulwongse, Krit

2012

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Design and Experiment of FMCW Radar System for Drone Detection

2022 37th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 2022, p.685-688

2022

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Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory

IEEE Custom Integrated Circuits Conference 2010, 2010, p.1-4

2010

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A Comparative Study of Machine Learning and Deep Learning Models for Microplastic Classification using FTIR Spectra

2023 18th International Joint Symposium on Artificial Intelligence and Natural Language Processing (iSAI-NLP), 2023, p.1-6

2023

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Backend low-k TDDB chip reliability simulator

2011 International Reliability Physics Symposium, 2011, p.2C.2.1-2C.2.10

2011

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Hyperbolic Pattern Detection in Ground Penetrating Radar Images Using Faster R-CNN

2023 20th International Conference on Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2023, p.1-4

2023

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A study of Through-Silicon-Via impact on the 3D stacked IC layout

2009 IEEE/ACM International Conference on Computer-Aided Design - Digest of Technical Papers, 2009, p.674-680

2009

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Impact of Altitude of Anchors on Performance of UWB Real-Time Locating System

2018 International Conference on Embedded Systems and Intelligent Technology & International Conference on Information and Communication Technology for Embedded Systems (ICESIT-ICICTES), 2018, p.1-6

2018

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Improved Step Detection with Smartphone Handheld Mode Recognition

2021 13th International Conference on Knowledge and Smart Technology (KST), 2021, p.55-60

2021

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Application Specific Architecture for Hardware Accelerating HOG-SVM to Achieve High Throughput on HD Frames

2019 IEEE 30th International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2019, Vol.2160-052X, p.131-134

2019

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Implementation of and Experimentation with Ground-Penetrating Radar for Real-Time Automatic Detection of Buried Improvised Explosive Devices

Study of Through-Silicon-Via Impact on the 3-D Stacked IC Layout

Mapping the Physical and Dielectric Properties of Layered Soil Using Short-Time Matrix Pencil Method-Based Ground-Penetrating Radar

High Performance Application Specific Stream Architecture for Hardware Acceleration of HOG-SVM on FPGA

Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory)

Automatic Detection and Classification of Buried Objects Using Ground‐Penetrating Radar for Counter‐Improvised Explosive Devices

Exploiting Die-to-Die Thermal Coupling in 3-D IC Placement

Impact of Mechanical Stress on the Full Chip Timing for Through-Silicon-Via-based 3-D ICs

3D-MAPS: 3D Massively parallel processor with stacked memory

Stress-driven 3D-IC placement with TSV keep-out zone and regularity study

Fast bidirectional shortest path on GPU

TSV stress aware timing analysis with applications to 3D-IC layout optimization

FMCW Radar-Based Enhancing Moving Target Positioning Accuracy in Spectrogram Mapping

A Surveillance System Utilizing mmWave-FMCW Radar for Restricted Control Area

Exploiting die-to-die thermal coupling in 3D IC placement

Placement for fast and reliable through-silicon-via (TSV) based 3D-IC layouts

Design and Experiment of FMCW Radar System for Drone Detection

Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory

A Comparative Study of Machine Learning and Deep Learning Models for Microplastic Classification using FTIR Spectra

Backend low-k TDDB chip reliability simulator

Hyperbolic Pattern Detection in Ground Penetrating Radar Images Using Faster R-CNN

A study of Through-Silicon-Via impact on the 3D stacked IC layout

Impact of Altitude of Anchors on Performance of UWB Real-Time Locating System

Improved Step Detection with Smartphone Handheld Mode Recognition

Application Specific Architecture for Hardware Accelerating HOG-SVM to Achieve High Throughput on HD Frames

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