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Modeling the Operation of Charge Trap Flash Memory-Part I: The Importance of Carrier Energy Relaxation

IEEE transactions on electron devices, 2024-01, Vol.71 (1), p.547-553

2024

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A methodology for mechanical stress and wafer warpage minimization during 3D NAND fabrication

Microelectronic engineering, 2022-02, Vol.254, p.111660, Article 111660

2022

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A Novel Ni-Al Alloy Metal Induced Lateral Crystallization Process for Improved Channel Conduction in 3-D NAND Flash

IEEE electron device letters, 2022-12, Vol.43 (12), p.2085-2088

2022

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Program charge interference and mitigation in vertically scaled single and multiple-channel 3D NAND flash memory

2021 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), 2021, p.268-271

2021

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Investigation of the Impact of Ferroelectricity Boosted Gate Stacks for 3D NAND on Short Time Data Retention and Endurance

2024 IEEE International Reliability Physics Symposium (IRPS), 2024, p.1-6

2024

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Exploring the Reliability Limits for the Z-Pitch Scaling of Molybdenum Inter-Word Line Oxides in 3D NAND

2024 IEEE International Reliability Physics Symposium (IRPS), 2024, p.1-5

2024

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Unexpected artefacts and occult pathologies under CBCT

Oral & implantology, 2017-04, Vol.10 (2), p.97-104

2017

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Comprehensive investigation of the impact of lateral charge migration on retention performance of planar and 3D SONOS devices

Solid-state electronics, 2012-08, Vol.74, p.64-70

2012

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Experimental and Simulation Analysis of Program/Retention Transients in Silicon Nitride-Based NVM Cells

IEEE transactions on electron devices, 2009-09, Vol.56 (9), p.1980-1990

2009

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Validation of Retention Modeling as a Trap-Profiling Technique for SiN-Based Charge-Trapping Memories

IEEE electron device letters, 2010-01, Vol.31 (1), p.77-79

2010

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Highly Scaled Vertical Cylindrical SONOS Cell With Bilayer Polysilicon Channel for 3-D nand Flash Memory

IEEE electron device letters, 2011-11, Vol.32 (11), p.1501-1503

2011

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Assessment of tunnel oxide and poly-Si channel traps in 3D SONOS memory before and after P/E cycling

Microelectronic engineering, 2015-11, Vol.147, p.45-50

2015

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3D TCAD Model for Poly-Si Channel Current and Variability in Vertical NAND Flash Memory

2019 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD), 2019, p.1-4

2019

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Experimental Characterization of the Vertical Position of the Trapped Charge in Si Nitride-Based Nonvolatile Memory Cells

IEEE transactions on electron devices, 2008-05, Vol.55 (5), p.1211-1219

2008

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Long term charge retention dynamics of SONOS cells

Solid-state electronics, 2008-09, Vol.52 (9), p.1460-1466

2008

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Electron Trap Profiling Near Al2O3/Gate Interface in TANOS Stack Using Gate-Side Trap Spectroscopy by Charge Injection and Sensing

IEEE electron device letters, 2010-10, Vol.31 (10), p.1158-1160

2010

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Respiratory disorders in paediatric age: orthodontic diagnosis and treatment in dysmetabolic obese children and allergic slim children

European journal of paediatric dentistry, 2013-09, Vol.14 (3), p.190

2013

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Application of Single Pulse Dynamics to Model Program and Erase Cycling-Induced Defects in the Tunnel Oxide of Charge-Trapping Devices

2019 IEEE International Integrated Reliability Workshop (IIRW), 2019, p.1-3

2019

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First demonstration of monocrystalline silicon macaroni channel for 3-D NAND memory devices

2018 IEEE Symposium on VLSI Technology, 2018, p.203-204

2018

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Vertical Ferroelectric HfO2 FET based on 3-D NAND Architecture: Towards Dense Low-Power Memory

2018 IEEE International Electron Devices Meeting (IEDM), 2018, p.2.5.1-2.5.4

2018

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Communication through telemedicine: home teleassistance in orthodontics

European journal of paediatric dentistry, 2009-12, Vol.10 (4), p.163

2009

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Electron Trap Profiling Near \hbox \hbox/Gate Interface in TANOS Stack Using Gate-Side Trap Spectroscopy by Charge Injection and Sensing

IEEE electron device letters, 2010-10, Vol.31 (10), p.1158-1160

2010

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Effect of high temperature annealing on tunnel oxide properties in TANOS devices

Microelectronic engineering, 2011-07, Vol.88 (7), p.1155-1158

2011

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An inner gate as enabler for vertical pitch scaling in macaroni channel gate-all-around 3-D NAND flash memory

Solid-state electronics, 2023-01, Vol.199, p.108498, Article 108498

2023

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Laser thermal anneal of polysilicon channel to boost 3D memory performance

2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014, p.1-2

2014

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Modeling the Operation of Charge Trap Flash Memory-Part I: The Importance of Carrier Energy Relaxation

A methodology for mechanical stress and wafer warpage minimization during 3D NAND fabrication

A Novel Ni-Al Alloy Metal Induced Lateral Crystallization Process for Improved Channel Conduction in 3-D NAND Flash

Program charge interference and mitigation in vertically scaled single and multiple-channel 3D NAND flash memory

Investigation of the Impact of Ferroelectricity Boosted Gate Stacks for 3D NAND on Short Time Data Retention and Endurance

Exploring the Reliability Limits for the Z-Pitch Scaling of Molybdenum Inter-Word Line Oxides in 3D NAND

Unexpected artefacts and occult pathologies under CBCT

Comprehensive investigation of the impact of lateral charge migration on retention performance of planar and 3D SONOS devices

Experimental and Simulation Analysis of Program/Retention Transients in Silicon Nitride-Based NVM Cells

Validation of Retention Modeling as a Trap-Profiling Technique for SiN-Based Charge-Trapping Memories

Highly Scaled Vertical Cylindrical SONOS Cell With Bilayer Polysilicon Channel for 3-D nand Flash Memory

Assessment of tunnel oxide and poly-Si channel traps in 3D SONOS memory before and after P/E cycling

3D TCAD Model for Poly-Si Channel Current and Variability in Vertical NAND Flash Memory

Experimental Characterization of the Vertical Position of the Trapped Charge in Si Nitride-Based Nonvolatile Memory Cells

Long term charge retention dynamics of SONOS cells

Electron Trap Profiling Near Al2O3/Gate Interface in TANOS Stack Using Gate-Side Trap Spectroscopy by Charge Injection and Sensing

Respiratory disorders in paediatric age: orthodontic diagnosis and treatment in dysmetabolic obese children and allergic slim children

Application of Single Pulse Dynamics to Model Program and Erase Cycling-Induced Defects in the Tunnel Oxide of Charge-Trapping Devices

First demonstration of monocrystalline silicon macaroni channel for 3-D NAND memory devices

Vertical Ferroelectric HfO2 FET based on 3-D NAND Architecture: Towards Dense Low-Power Memory

Communication through telemedicine: home teleassistance in orthodontics

Electron Trap Profiling Near \hbox \hbox/Gate Interface in TANOS Stack Using Gate-Side Trap Spectroscopy by Charge Injection and Sensing

Effect of high temperature annealing on tunnel oxide properties in TANOS devices

An inner gate as enabler for vertical pitch scaling in macaroni channel gate-all-around 3-D NAND flash memory

Laser thermal anneal of polysilicon channel to boost 3D memory performance

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