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Modeling and sensitivity analysis of bearing capacity in driven piles using hybrid ANN–PSO algorithm

Arabian journal of geosciences, 2022-02, Vol.15 (3), Article 309

2022

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Assessment of lateral performance of monopiles: monopile foundation equipped with concrete-filled double skin steel tubular structure and with steel wheel

Arabian journal of geosciences, 2022, Vol.15 (2), Article 155

2022

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Toxicity and Antiparasitic Efficacy of Essential Oils: Analyses of the Biochemical Compositions and Potencies

Iranian journal of toxicology, 2021-01, Vol.15 (1), p.1-8

2021

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Experimental investigation of the feasibility of stabilizing inshore silty sand soil using geopolymer based on ceramic waste powder: An approach to upcycling waste material for sustainable construction

Case Studies in Construction Materials, 2024-07, Vol.20, p.e02979, Article e02979

2024

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Variable Resistance Spectrum Assignment in Phase Change Memory Systems

IEEE transactions on very large scale integration (VLSI) systems, 2015-11, Vol.23 (11), p.2657-2670

2015

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A Hybrid Non-Volatile Cache Design for Solid-State Drives Using Comprehensive I/O Characterization

IEEE transactions on computers, 2016-06, Vol.65 (6), p.1678-1691

2016

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Performance and Power-Efficient Design of Dense Non-Volatile Cache in CMPs

IEEE transactions on computers, 2018-07, Vol.67 (7), p.1054-1061

2018

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Boosting Access Parallelism to PCM-Based Main Memory

2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA), 2016, p.695-706

2016

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HL-PCM: MLC PCM Main Memory with Accelerated Read

IEEE transactions on parallel and distributed systems, 2017-11, Vol.28 (11), p.3188-3200

2017

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Prolonging Lifetime of PCM-Based Main Memories through On-Demand Page Pairing

ACM transactions on design automation of electronic systems, 2015-02, Vol.20 (2), p.1-24

2015

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SPCM: The Striped Phase Change Memory

ACM transactions on architecture and code optimization, 2016-01, Vol.12 (4), p.1-25

2016

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Architecting the Last-Level Cache for GPUs using STT-RAM Technology

ACM transactions on design automation of electronic systems, 2015-09, Vol.20 (4), p.1-24

2015

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Reducing access latency of MLC PCMs through line striping

2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA), 2014, p.277-288

2014

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Reducing access latency of MLC PCMs through line striping

Proceeding of the 41st annual international symposium on Computer architecuture, 2014, p.277-288

2014

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Predicting the Earthquake Magnitude Using the Multilayer Perceptron Neural Network with Two Hidden Layers

Civil Engineering Journal, 2016-01, Vol.2 (1), p.1-12

2016

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Power-Performance Analysis of Networks-on-Chip With Arbitrary Buffer Allocation Schemes

IEEE transactions on computer-aided design of integrated circuits and systems, 2010-10, Vol.29 (10), p.1558-1571

2010

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High-endurance and performance-efficient design of hybrid cache architectures through adaptive line replacement

IEEE/ACM International Symposium on Low Power Electronics and Design, 2011, p.79-84

2011

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Exploiting Intra-Request Slack to Improve SSD Performance

Operating systems review, 2017-04, Vol.51 (2), p.375-388

2017

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A generic FPGA prototype for on-chip systems with network-on-chip communication infrastructure

Computers & electrical engineering, 2014-01, Vol.40 (1), p.158-167

2014

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Exploring the Potential for Collaborative Data Compression and Hard-Error Tolerance in PCM Memories

2017 47th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), 2017, p.85-96

2017

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Efficient Mapping of Applications for Future Chip-Multiprocessors in Dark Silicon Era

ACM transactions on design automation of electronic systems, 2017-10, Vol.22 (4), p.1-26

2017

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An Efficient STT-RAM Last Level Cache Architecture for GPUs

2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 2014, p.1-6

2014

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Exploiting Data Longevity for Enhancing the Lifetime of Flash-based Storage Class Memory

Proceedings of the ACM on measurement and analysis of computing systems, 2017-06, Vol.1 (1), p.1-26

2017

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Content Popularity-Based Selective Replication for Read Redirection in SSDs

2018 IEEE 26th International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS), 2018, p.1-15

2018

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A Reliable 3D MLC PCM Architecture with Resistance Drift Predictor

2014 44th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2014, p.204-215

2014

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Modeling and sensitivity analysis of bearing capacity in driven piles using hybrid ANN–PSO algorithm

Assessment of lateral performance of monopiles: monopile foundation equipped with concrete-filled double skin steel tubular structure and with steel wheel

Toxicity and Antiparasitic Efficacy of Essential Oils: Analyses of the Biochemical Compositions and Potencies

Experimental investigation of the feasibility of stabilizing inshore silty sand soil using geopolymer based on ceramic waste powder: An approach to upcycling waste material for sustainable construction

Variable Resistance Spectrum Assignment in Phase Change Memory Systems

A Hybrid Non-Volatile Cache Design for Solid-State Drives Using Comprehensive I/O Characterization

Performance and Power-Efficient Design of Dense Non-Volatile Cache in CMPs

Boosting Access Parallelism to PCM-Based Main Memory

HL-PCM: MLC PCM Main Memory with Accelerated Read

Prolonging Lifetime of PCM-Based Main Memories through On-Demand Page Pairing

SPCM: The Striped Phase Change Memory

Architecting the Last-Level Cache for GPUs using STT-RAM Technology

Reducing access latency of MLC PCMs through line striping

Reducing access latency of MLC PCMs through line striping

Predicting the Earthquake Magnitude Using the Multilayer Perceptron Neural Network with Two Hidden Layers

Power-Performance Analysis of Networks-on-Chip With Arbitrary Buffer Allocation Schemes

High-endurance and performance-efficient design of hybrid cache architectures through adaptive line replacement

Exploiting Intra-Request Slack to Improve SSD Performance

A generic FPGA prototype for on-chip systems with network-on-chip communication infrastructure

Exploring the Potential for Collaborative Data Compression and Hard-Error Tolerance in PCM Memories

Efficient Mapping of Applications for Future Chip-Multiprocessors in Dark Silicon Era

An Efficient STT-RAM Last Level Cache Architecture for GPUs

Exploiting Data Longevity for Enhancing the Lifetime of Flash-based Storage Class Memory

Content Popularity-Based Selective Replication for Read Redirection in SSDs

A Reliable 3D MLC PCM Architecture with Resistance Drift Predictor

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