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Design Methodology for Phase-Locked Loops Using Binary (Bang-Bang) Phase Detectors

IEEE transactions on circuits and systems. I, Regular papers, 2017-07, Vol.64 (7), p.1637-1650

2017

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Analysis and Design of a Robust, Low-Power, Inductively Coupled LSK Data Link

IEEE journal of solid-state circuits, 2020-09, Vol.55 (9), p.1-1

2020

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FET-R-C Circuits: A Unified Treatment-Part I: Signal Transfer Characteristics of a Single-Path

IEEE transactions on circuits and systems. I, Regular papers, 2016-09, Vol.63 (9), p.1325-1336

2016

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FET-R-C Circuits: A Unified Treatment-Part II: Extension to Multi-Paths, Noise Figure, and Driving-Point Impedance

IEEE transactions on circuits and systems. I, Regular papers, 2016-09, Vol.63 (9), p.1337-1348

2016

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Comprehensive Analysis of Distortion in the Passive FET Sample-and-Hold Circuit

IEEE transactions on circuits and systems. I, Regular papers, 2018-04, Vol.65 (4), p.1157-1173

2018

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An 800-MHz-6-GHz Software-Defined Wireless Receiver in 90-nm CMOS

IEEE journal of solid-state circuits, 2006-12, Vol.41 (12), p.2860-2876

2006

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Phase Noise in LC Oscillators: A Phasor-Based Analysis of a General Result and of Loaded Q

IEEE transactions on circuits and systems. I, Regular papers, 2010-06, Vol.57 (6), p.1187-1203

2010

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Analysis and Design of Regenerative Comparators for Low Offset and Noise

IEEE transactions on circuits and systems. I, Regular papers, 2019-08, Vol.66 (8), p.2817-2830

2019

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A Unified Analysis of the Signal Transfer Characteristics of a Single-Path FET-R-C Circuit

IEICE transactions on electronics, 2018-07, Vol.E101.C (7), p.432-443

2018

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Design and Analysis of an Electrical Balance Duplexer With Independent and Concurrent Dual-Band TX-RX Isolation

IEEE journal of solid-state circuits, 2022-05, Vol.57 (5), p.1385-1396

2022

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Multi-Phase Injection Widens Lock Range of Ring-Oscillator-Based Frequency Dividers

IEEE journal of solid-state circuits, 2008-03, Vol.43 (3), p.656-671

2008

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Phase Noise and Jitter in CMOS Ring Oscillators

IEEE journal of solid-state circuits, 2006-08, Vol.41 (8), p.1803-1816

Abidi, A.A.

2006

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Second-Order Transimpedance Amplifiers in Mixer-First Receivers: Design for Optimum Blocker Tolerance

IEEE transactions on circuits and systems. I, Regular papers, 2023-05, Vol.70 (5), p.1-14

2023

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A Multiband RF Antenna Duplexer on CMOS: Design and Performance

IEEE journal of solid-state circuits, 2013-09, Vol.48 (9), p.2067-2077

2013

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Processes of AM-PM Distortion in Large-Signal Single-FET Amplifiers

IEEE transactions on circuits and systems. I, Regular papers, 2017-02, Vol.64 (2), p.245-260

2017

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The Path to the Software-Defined Radio Receiver

IEEE journal of solid-state circuits, 2007-05, Vol.42 (5), p.954-966

Abidi, A.A.

2007

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A 9 b, 1.25 ps Resolution Coarse-Fine Time-to-Digital Converter in 90 nm CMOS that Amplifies a Time Residue

IEEE journal of solid-state circuits, 2008-04, Vol.43 (4), p.769-777

2008

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Approximate Equivalent Circuits to Understand Tradeoffs in Geometry of On-Chip Inductors

IEEE transactions on circuits and systems. I, Regular papers, 2021-03, Vol.68 (3), p.975-988

2021

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Simultaneous Transmission of Up To 94-mW Self-Regulated Wireless Power and Up To 5-Mb/s Reverse Data Over a Single Pair of Coils

IEEE journal of solid-state circuits, 2019-04, Vol.54 (4), p.1003-1016

2019

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Envelope Tracking Supply Modulator with Trellis-Search-Based Switching and 160-MHz Capability

IEEE journal of solid-state circuits, 2022-03, Vol.57 (3), p.719-733

2022

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A 3-10-GHz low-noise amplifier with wideband LC-ladder matching network

IEEE journal of solid-state circuits, 2004-12, Vol.39 (12), p.2269-2277

2004

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A Harmonic-Mixing PLL Architecture for Millimeter-Wave Application

IEEE journal of solid-state circuits, 2022-12, Vol.57 (12), p.3552-3566

2022

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A filtering technique to lower LC oscillator phase noise

IEEE journal of solid-state circuits, 2001-12, Vol.36 (12), p.1921-1930

2001

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A Tutorial on Systematic Design of CMOS A/D Converters: Illustrated by a 10 b, 500 MS/s SAR ADC with 2 GHz RBW

ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC), 2021, p.381-386

2021

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The Quadrature LC Oscillator: A Complete Portrait Based on Injection Locking

IEEE journal of solid-state circuits, 2007-09, Vol.42 (9), p.1916-1932

2007

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Design Methodology for Phase-Locked Loops Using Binary (Bang-Bang) Phase Detectors

Analysis and Design of a Robust, Low-Power, Inductively Coupled LSK Data Link

FET-R-C Circuits: A Unified Treatment-Part I: Signal Transfer Characteristics of a Single-Path

FET-R-C Circuits: A Unified Treatment-Part II: Extension to Multi-Paths, Noise Figure, and Driving-Point Impedance

Comprehensive Analysis of Distortion in the Passive FET Sample-and-Hold Circuit

An 800-MHz-6-GHz Software-Defined Wireless Receiver in 90-nm CMOS

Phase Noise in LC Oscillators: A Phasor-Based Analysis of a General Result and of Loaded Q

Analysis and Design of Regenerative Comparators for Low Offset and Noise

A Unified Analysis of the Signal Transfer Characteristics of a Single-Path FET-R-C Circuit

Design and Analysis of an Electrical Balance Duplexer With Independent and Concurrent Dual-Band TX-RX Isolation

Multi-Phase Injection Widens Lock Range of Ring-Oscillator-Based Frequency Dividers

Phase Noise and Jitter in CMOS Ring Oscillators

Second-Order Transimpedance Amplifiers in Mixer-First Receivers: Design for Optimum Blocker Tolerance

A Multiband RF Antenna Duplexer on CMOS: Design and Performance

Processes of AM-PM Distortion in Large-Signal Single-FET Amplifiers

The Path to the Software-Defined Radio Receiver

A 9 b, 1.25 ps Resolution Coarse-Fine Time-to-Digital Converter in 90 nm CMOS that Amplifies a Time Residue

Approximate Equivalent Circuits to Understand Tradeoffs in Geometry of On-Chip Inductors

Simultaneous Transmission of Up To 94-mW Self-Regulated Wireless Power and Up To 5-Mb/s Reverse Data Over a Single Pair of Coils

Envelope Tracking Supply Modulator with Trellis-Search-Based Switching and 160-MHz Capability

A 3-10-GHz low-noise amplifier with wideband LC-ladder matching network

A Harmonic-Mixing PLL Architecture for Millimeter-Wave Application

A filtering technique to lower LC oscillator phase noise

A Tutorial on Systematic Design of CMOS A/D Converters: Illustrated by a 10 b, 500 MS/s SAR ADC with 2 GHz RBW

The Quadrature LC Oscillator: A Complete Portrait Based on Injection Locking

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