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A 4.24GHz 128X256 SRAM Operating Double Pump Read Write Same Cycle in 5nm Technology

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023, p.1-2

2023

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33.1 A 16nm 32Mb Embedded STT-MRAM with a 6ns Read-Access Time, a 1M-Cycle Write Endurance, 20-Year Retention at 150°C and MTJ-OTP Solutions for Magnetic Immunity

2023 IEEE International Solid- State Circuits Conference (ISSCC), 2023, p.494-496

2023

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A 16-kb Antifuse One-Time-Programmable Memory in 5-nm High-K Metal-Gate FinFET CMOS Featuring Bootstrap High-Voltage Scheme, Read Endpoint Detection, and Pseudodifferential Sensing

IEEE solid-state circuits letters, 2021, Vol.4, p.170-173

2021

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A 40nm 2Mb ReRAM Macro with 85% Reduction in FORMING Time and 99% Reduction in Page-Write Time Using Auto-FORMING and Auto-Write Schemes

2019 Symposium on VLSI Technology, 2019, p.T232-T233

2019

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A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023, p.1-2

2023

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Derivation and characterization of putative embryonic stem cells from cloned rabbit embryos

Theriogenology, 2016-10, Vol.86 (7), p.1799-1810

2016

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A 22nm 8Mb STT-MRAM Near-Memory-Computing Macro with 8b-Precision and 46.4-160.1TOPS/W for Edge-AI Devices

2023 IEEE International Solid- State Circuits Conference (ISSCC), 2023, p.496-498

2023

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An N40 256K×44 embedded RRAM macro with SL-precharge SA and low-voltage current limiter to improve read and write performance

2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, p.478-480

2018

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Rictor-dependent AKT activation and inhibition of urothelial carcinoma by rapamycin

Urologic oncology, 2012, Vol.30 (1), p.69-77

2012

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A Trip Down Memory Lane: Reflections on the progress in memories

IEEE solid state circuits magazine, 2023-01, Vol.15 (3), p.53-61

2023

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Nitric oxide and glutamate in the dorsal facial area regulate common carotid blood flow in the cat

European journal of pharmacology, 2008-10, Vol.594 (1), p.55-63

2008

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Regulation of common carotid arterial blood flow by nitrergic neurons in the medulla of cats

European journal of pharmacology, 2007-02, Vol.556 (1), p.84-88

2007

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A novel maternally transcribed homeobox gene, Eso-1, is preferentially expressed in oocytes and regulated by cytoplasmic polyadenylation

Molecular reproduction and development, 2006-07, Vol.73 (7), p.825-833

2006

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Activated Matrix Metalloproteinase and Disrupted Myocardial Collagen Matrix in Increased Sympathetic Activity Following Stimulation of Dorsal Medulla in the Vagotomized Feline Model

Chinese journal of physiology, 2008-02, Vol.51 (1), p.7-12

2008

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Sympathetic activity and myocardial damage after stimulation of dorsal medulla and vagotomy in a novel animal model

International journal of cardiology, 2005-04, Vol.100 (3), p.401-407

2005

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Abolishing Trp53-dependent apoptosis does not benefit spinal muscular atrophy model mice

European journal of human genetics : EJHG, 2006-03, Vol.14 (3), p.372-375

2006

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3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM With Leakage Saving Circuits in 3-nm FinFET for HPC Applications

IEEE journal of solid-state circuits, 2024-08, p.1-9

2024

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An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM

2020 IEEE Symposium on VLSI Circuits, 2020, p.1-2

2020

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Inhibitory actions of serotonin on glutamate release in dorsal medulla suppress systemic arterial pressure of cats

Neuroscience letters, 2004-01, Vol.355 (1), p.73-76

2004

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A 5-nm 135-Mb SRAM in EUV and High-Mobility Channel FinFET Technology With Metal Coupling and Charge-Sharing Write-Assist Circuitry Schemes for High-Density and Low-VMIN Applications

IEEE journal of solid-state circuits, 2021-01, Vol.56 (1), p.179-187

2021

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A 4.24GHz 128X256 SRAM Operating Double Pump Read Write Same Cycle in 5nm Technology

IEEE solid-state circuits letters, 2023-11, p.1-1

2023

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34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm2 and 3.78Mb/mm2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit Cell

2024 IEEE International Solid-State Circuits Conference (ISSCC), 2024, Vol.67, p.572-574

2024

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15.7 A 32Mb RRAM in a 12nm FinFet Technology with a 0.0249μm2 Bit-Cell, a 3.2GB/S Read Throughput, a 10KCycle Write Endurance and a 10-Year Retention at 105°C

2024 IEEE International Solid-State Circuits Conference (ISSCC), 2024, Vol.67, p.288-290

2024

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A 22nm 4Mb STT-MRAM Data-Encrypted Near-Memory Computation Macro with a 192GB/s Read-and-Decryption Bandwidth and 25.1-55.1TOPS/W 8b MAC for AI Operations

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.178-180

2022

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A 4nm 6163-TOPS/W/b \mathbf/b} SRAM Based Digital-Computing-in-Memory Macro Supporting Bit-Width Flexibility and Simultaneous MAC and Weight Update

2023 IEEE International Solid- State Circuits Conference (ISSCC), 2023, p.132-134

2023

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A 4.24GHz 128X256 SRAM Operating Double Pump Read Write Same Cycle in 5nm Technology

33.1 A 16nm 32Mb Embedded STT-MRAM with a 6ns Read-Access Time, a 1M-Cycle Write Endurance, 20-Year Retention at 150°C and MTJ-OTP Solutions for Magnetic Immunity

A 16-kb Antifuse One-Time-Programmable Memory in 5-nm High-K Metal-Gate FinFET CMOS Featuring Bootstrap High-Voltage Scheme, Read Endpoint Detection, and Pseudodifferential Sensing

A 40nm 2Mb ReRAM Macro with 85% Reduction in FORMING Time and 99% Reduction in Page-Write Time Using Auto-FORMING and Auto-Write Schemes

A 28nm Nonvolatile AI Edge Processor using 4Mb Analog-Based Near-Memory-Compute ReRAM with 27.2 TOPS/W for Tiny AI Edge Devices

Derivation and characterization of putative embryonic stem cells from cloned rabbit embryos

A 22nm 8Mb STT-MRAM Near-Memory-Computing Macro with 8b-Precision and 46.4-160.1TOPS/W for Edge-AI Devices

An N40 256K×44 embedded RRAM macro with SL-precharge SA and low-voltage current limiter to improve read and write performance

Rictor-dependent AKT activation and inhibition of urothelial carcinoma by rapamycin

A Trip Down Memory Lane: Reflections on the progress in memories

Nitric oxide and glutamate in the dorsal facial area regulate common carotid blood flow in the cat

Regulation of common carotid arterial blood flow by nitrergic neurons in the medulla of cats

A novel maternally transcribed homeobox gene, Eso-1, is preferentially expressed in oocytes and regulated by cytoplasmic polyadenylation

Activated Matrix Metalloproteinase and Disrupted Myocardial Collagen Matrix in Increased Sympathetic Activity Following Stimulation of Dorsal Medulla in the Vagotomized Feline Model

Sympathetic activity and myocardial damage after stimulation of dorsal medulla and vagotomy in a novel animal model

Abolishing Trp53-dependent apoptosis does not benefit spinal muscular atrophy model mice

3.7-GHz Multi-Bank High-Current Single-Port Cache SRAM With Leakage Saving Circuits in 3-nm FinFET for HPC Applications

An All-Weights-on-Chip DNN Accelerator in 22nm ULL Featuring 24×1 Mb eRRAM

Inhibitory actions of serotonin on glutamate release in dorsal medulla suppress systemic arterial pressure of cats

A 5-nm 135-Mb SRAM in EUV and High-Mobility Channel FinFET Technology With Metal Coupling and Charge-Sharing Write-Assist Circuitry Schemes for High-Density and Low-VMIN Applications

A 4.24GHz 128X256 SRAM Operating Double Pump Read Write Same Cycle in 5nm Technology

34.4 A 3nm, 32.5TOPS/W, 55.0TOPS/mm2 and 3.78Mb/mm2 Fully-Digital Compute-in-Memory Macro Supporting INT12 × INT12 with a Parallel-MAC Architecture and Foundry 6T-SRAM Bit Cell

15.7 A 32Mb RRAM in a 12nm FinFet Technology with a 0.0249μm2 Bit-Cell, a 3.2GB/S Read Throughput, a 10KCycle Write Endurance and a 10-Year Retention at 105°C

A 22nm 4Mb STT-MRAM Data-Encrypted Near-Memory Computation Macro with a 192GB/s Read-and-Decryption Bandwidth and 25.1-55.1TOPS/W 8b MAC for AI Operations

A 4nm 6163-TOPS/W/b \mathbf/b} SRAM Based Digital-Computing-in-Memory Macro Supporting Bit-Width Flexibility and Simultaneous MAC and Weight Update

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