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Integration challenges of copper Through Silicon Via (TSV) metallization for 3D-stacked IC integration

Microelectronic engineering, 2011-05, Vol.88 (5), p.745-748

2011

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Short-ranged structural rearrangement and enhancement of mechanical properties of organosilicate glasses induced by ultraviolet radiation

Journal of applied physics, 2006-03, Vol.99 (5), p.053511-053511-7

2006

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Challenges in the implementation of low-k dielectrics in the back-end of line

Microelectronic engineering, 2005-06, Vol.80, p.337-344

2005

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Selective self-assembled monolayer coating to enable Cu-to-Cu connection in dual damascene vias

Microelectronic engineering, 2013-06, Vol.106, p.76-80

2013

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Processing assessment and adhesion evaluation of copper through-silicon vias (TSVs) for three-dimensional stacked-integrated circuit (3D-SIC) architectures

Microelectronics and reliability, 2010-09, Vol.50 (9), p.1636-1640

2010

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Interface characterization of nanoscale laminate structures on dense dielectric substrates by x-ray reflectivity

Journal of applied physics, 2005-04, Vol.97 (8), p.084316-084316-9

2005

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Air gap formation by UV-assisted decomposition of CVD material

Microelectronic engineering, 2008-10, Vol.85 (10), p.2071-2074

2008

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Challenges for structural stability of ultra-low- k-based interconnects

Microelectronic engineering, 2004-07, Vol.75 (1), p.54-62

2004

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Minimizing plasma damage and in situ sealing of ultralow- k dielectric films by using oxygen free fluorocarbon plasmas

Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures, 2005-09, Vol.23 (5), p.2198-2202

2005

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Variation in process conditions of porogen-based low- k films: A method to improve performance without changing existing process steps in a sub-100 nm Cu damascene integration route

Microelectronic engineering, 2010-03, Vol.87 (3), p.311-315

2010

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On a More Accurate Assessment of Scaled Copper/Low-k Interconnects Performance

IEEE transactions on semiconductor manufacturing, 2007-08, Vol.20 (3), p.333-340

2007

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Materials characterization of WNxCy, WNx and WCx films for advanced barriers

Microelectronic engineering, 2007-11, Vol.84 (11), p.2460-2465

2007

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Surface properties restoration and passivation of high porosity ultra low- k dielectric ( k ∼ 2.3) after direct-CMP

Microelectronic engineering, 2007-11, Vol.84 (11), p.2620-2623

2007

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The impact of the density and type of reactive sites on the characteristics of the atomic layer deposited WNxCy films

Journal of applied physics, 2006-03, Vol.99 (6)

2006

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A novel approach to resistivity and interconnect modeling

Microelectronic engineering, 2006-11, Vol.83 (11), p.2417-2421

2006

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Study of thermal stability of nickel silicide by X-ray reflectivity

Microelectronic engineering, 2005-12, Vol.82 (3), p.492-496

2005

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Impact of thinning and through silicon via proximity on High-k / Metal Gate first CMOS performance

2010 Symposium on VLSI Technology, 2010, p.109-110

2010

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Characterization of atomic layer deposited nanoscale structure on dense dielectric substrates by X-ray reflectivity

Microelectronic engineering, 2005-12, Vol.82 (3), p.639-644

2005

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On the thermal stability of physically-vapor-deposited diffusion barriers in 3D Through-Silicon Vias during IC processing

Microelectronic engineering, 2013-06, Vol.106, p.155-159

2013

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Role of dielectric and barrier integrity in reliability of sub-100 nm copper low-k interconnects

2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual, 2005, p.495-500

2005

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Lateral solvent diffusion characterization of low k dielectric plasma damage and ALD barrier film closure

Microelectronic engineering, 2005-12, Vol.82 (3), p.411-415

2005

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Impact of material/process interactions on the properties of a porous CVD-O 3 low-k dielectric film

Microelectronic engineering, 2002-10, Vol.64 (1), p.367-374

2002

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Integration challenges of copper Through Silicon Via (TSV) metallization for 3D-stacked IC integration

Short-ranged structural rearrangement and enhancement of mechanical properties of organosilicate glasses induced by ultraviolet radiation

Challenges in the implementation of low-k dielectrics in the back-end of line

Selective self-assembled monolayer coating to enable Cu-to-Cu connection in dual damascene vias

Processing assessment and adhesion evaluation of copper through-silicon vias (TSVs) for three-dimensional stacked-integrated circuit (3D-SIC) architectures

Interface characterization of nanoscale laminate structures on dense dielectric substrates by x-ray reflectivity

Air gap formation by UV-assisted decomposition of CVD material

Challenges for structural stability of ultra-low- k-based interconnects

Minimizing plasma damage and in situ sealing of ultralow- k dielectric films by using oxygen free fluorocarbon plasmas

Variation in process conditions of porogen-based low- k films: A method to improve performance without changing existing process steps in a sub-100 nm Cu damascene integration route

On a More Accurate Assessment of Scaled Copper/Low-k Interconnects Performance

Materials characterization of WNxCy, WNx and WCx films for advanced barriers

Surface properties restoration and passivation of high porosity ultra low- k dielectric ( k ∼ 2.3) after direct-CMP

The impact of the density and type of reactive sites on the characteristics of the atomic layer deposited WNxCy films

A novel approach to resistivity and interconnect modeling

Study of thermal stability of nickel silicide by X-ray reflectivity

Impact of thinning and through silicon via proximity on High-k / Metal Gate first CMOS performance

Characterization of atomic layer deposited nanoscale structure on dense dielectric substrates by X-ray reflectivity

On the thermal stability of physically-vapor-deposited diffusion barriers in 3D Through-Silicon Vias during IC processing

Role of dielectric and barrier integrity in reliability of sub-100 nm copper low-k interconnects

Lateral solvent diffusion characterization of low k dielectric plasma damage and ALD barrier film closure

Impact of material/process interactions on the properties of a porous CVD-O 3 low-k dielectric film

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