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Depth and lateral resolution of laser-assisted atom probe microscopy of silicon revealed by isotopic heterostructures

Journal of applied physics, 2011-02, Vol.109 (3)

2011

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Proposal of Single Metal/Dual High- k Devices for Aggressively Scaled CMISFETs With Precise Gate Profile Control

IEEE transactions on electron devices, 2009-01, Vol.56 (1), p.85-92

2009

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Compact modeling of a flash memory cell including substrate-bias-dependent hot-electron gate current

IEEE transactions on electron devices, 2004-10, Vol.51 (10), p.1726-1733

2004

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Suppression of anomalous threshold voltage increase with area scaling for Mg- or La-incorporated high-k/Metal gate nMISFETs in deeply scaled region

2010 Symposium on VLSI Technology, 2010, p.33-34

2010

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Positronium formation in SiO2 films grown on Si substrates studied by monoenergetic positron beams

Journal of applied physics, 1994-04, Vol.75 (8), p.3822-3828

1994

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Silicon on thin BOX: a new paradigm of the CMOSFET for low-power high-performance application featuring wide-range back-bias control

IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004, 2004, p.631-634

2004

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Ultralow-Thermal-Budget CMOS Process Using Flash-Lamp Annealing for 45 nm Metal/High- k FETs

IEEE transactions on electron devices, 2008-04, Vol.55 (4), p.1042-1049

2008

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Stoichiometry measurement and electric characteristics of thin-film Ta2O5 insulator for ultra-large-scale integration

Journal of applied physics, 1993-07, Vol.74 (1), p.375-380

1993

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NBT-induced hot carrier (HC) effect: positive feedback mechanism in p-MOSFET's degradation

2002 IEEE International Reliability Physics Symposium. Proceedings. 40th Annual (Cat. No.02CH37320), 2002, p.79-85

2002

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Positron annihilation in a metal-oxide semiconductor studied by using a pulsed monoenergetic positron beam

Journal of applied physics, 1993-12, Vol.74 (12), p.7251-7256

1993

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Metal/oxide/semiconductor interface investigated by monoenergetic positrons

Physics letters. A, 1988-10, Vol.133 (1), p.82-84

1988

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Systematic study of the relationship between 1/ƒ noise, interface state defects and mobility ddgradtion of high-K /metal CMOSFETs on (110) and (100) substrate

2009 IEEE International Reliability Physics Symposium, 2009, p.45-50

2009

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W-Polymetal Gate with Low W/Poly-Si Interface Resistance for High-Speed/High-Density Embedded Memory

Japanese Journal of Applied Physics, 2004-04, Vol.43 (4S), p.1799

2004

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Effect of Annealing on Electronic Characteristics of HfSiON Films fabricated by Damascene Gate Process

ECS transactions, 2009, Vol.16 (5), p.521-526

2009

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Theoretical approach and precise description of PBTI in high-k gate dielectrics based on electron trap in pre-existing and stress-induced defects

2009 IEEE International Reliability Physics Symposium, 2009, p.973-976

2009

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Novel Shallow Trench Isolation Process from Viewpoint of Total Strain Process Design for 45 nm Node Devices and Beyond

Japanese Journal of Applied Physics, 2005-04, Vol.44 (4S), p.2152

2005

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Full 3D string-level simulation of NAND flash device

2008 International Conference on Simulation of Semiconductor Processes and Devices, 2008, p.37-40

2008

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Suppression of Boron Penetration from Source/Drain-Extension to Improve Gate Leakage Characteristics and Gate-Oxide Reliability for 65-nm Node CMOS and Beyond

Japanese Journal of Applied Physics, 2005-04, Vol.44 (4S), p.2157

2005

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A conformal ruthenium electrode for MIM capacitors in Gbit DRAMs using the CVD technology based on oxygen-controlled surface reaction

2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104), 2000, p.102-103

2000

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Uniform Ultra-Thin Pb(Zr,Ti)O 3 Films Formed by Metal-Organic Chemical Vapor Deposition and Their Electrical Characteristics

Japanese Journal of Applied Physics, 1994-09, Vol.33 (9S), p.5143

1994

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Preparation of Lead Zirconate Titanate Thin Films by Reactive Evaporation

Japanese Journal of Applied Physics, 1994, Vol.33 (9S), p.5287

1994

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Impact of low-standby-power device design on hot carrier reliability

2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184), 2001, p.119-120

2001

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Dielectric characteristics of fluorinated ultradry SiO2

Applied physics letters, 1989-03, Vol.54 (12), p.1127-1129

1989

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Effects of minute impurities (H, OH, F) on SiO2/Si interface as investigated by nuclear resonant reaction and electron spin resonance

IEEE transactions on electron devices, 1990-07, Vol.37 (7), p.1635-1642

1990

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Improving program/erase endurance by controlling the inter-poly process in flash memory

Proceedings of 1995 IEEE International Reliability Physics Symposium, 1995, p.18-23

1995

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Depth and lateral resolution of laser-assisted atom probe microscopy of silicon revealed by isotopic heterostructures

Proposal of Single Metal/Dual High- k Devices for Aggressively Scaled CMISFETs With Precise Gate Profile Control

Compact modeling of a flash memory cell including substrate-bias-dependent hot-electron gate current

Suppression of anomalous threshold voltage increase with area scaling for Mg- or La-incorporated high-k/Metal gate nMISFETs in deeply scaled region

Positronium formation in SiO2 films grown on Si substrates studied by monoenergetic positron beams

Silicon on thin BOX: a new paradigm of the CMOSFET for low-power high-performance application featuring wide-range back-bias control

Ultralow-Thermal-Budget CMOS Process Using Flash-Lamp Annealing for 45 nm Metal/High- k FETs

Stoichiometry measurement and electric characteristics of thin-film Ta2O5 insulator for ultra-large-scale integration

NBT-induced hot carrier (HC) effect: positive feedback mechanism in p-MOSFET's degradation

Positron annihilation in a metal-oxide semiconductor studied by using a pulsed monoenergetic positron beam

Metal/oxide/semiconductor interface investigated by monoenergetic positrons

Systematic study of the relationship between 1/ƒ noise, interface state defects and mobility ddgradtion of high-K /metal CMOSFETs on (110) and (100) substrate

W-Polymetal Gate with Low W/Poly-Si Interface Resistance for High-Speed/High-Density Embedded Memory

Effect of Annealing on Electronic Characteristics of HfSiON Films fabricated by Damascene Gate Process

Theoretical approach and precise description of PBTI in high-k gate dielectrics based on electron trap in pre-existing and stress-induced defects

Novel Shallow Trench Isolation Process from Viewpoint of Total Strain Process Design for 45 nm Node Devices and Beyond

Full 3D string-level simulation of NAND flash device

Suppression of Boron Penetration from Source/Drain-Extension to Improve Gate Leakage Characteristics and Gate-Oxide Reliability for 65-nm Node CMOS and Beyond

A conformal ruthenium electrode for MIM capacitors in Gbit DRAMs using the CVD technology based on oxygen-controlled surface reaction

Uniform Ultra-Thin Pb(Zr,Ti)O 3 Films Formed by Metal-Organic Chemical Vapor Deposition and Their Electrical Characteristics

Preparation of Lead Zirconate Titanate Thin Films by Reactive Evaporation

Impact of low-standby-power device design on hot carrier reliability

Dielectric characteristics of fluorinated ultradry SiO2

Effects of minute impurities (H, OH, F) on SiO2/Si interface as investigated by nuclear resonant reaction and electron spin resonance

Improving program/erase endurance by controlling the inter-poly process in flash memory

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