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Gate-based high fidelity spin readout in a CMOS device

Nature nanotechnology, 2019-08, Vol.14 (8), p.737-741

2019

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Low-temperature electrical characterization of junctionless transistors

Solid-state electronics, 2013-02, Vol.80, p.135-141

2013

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Less mobility degradation induced by transverse electric-field in junctionless transistors

Applied physics letters, 2014-11, Vol.105 (21)

2014

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Strain-Induced Performance Enhancement of Trigate and Omega-Gate Nanowire FETs Scaled Down to 10-nm Width

IEEE transactions on electron devices, 2013-02, Vol.60 (2), p.727-732

2013

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Low-temperature operation of junctionless nanowire transistors: Less surface roughness scattering effects and dominant scattering mechanisms

Applied physics letters, 2014-12, Vol.105 (26)

2014

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Low-frequency noise behavior of junctionless transistors compared to inversion-mode transistors

Solid-state electronics, 2013-03, Vol.81, p.101-104

2013

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Effects of channel width variation on electrical characteristics of tri-gate Junctionless transistors

Solid-state electronics, 2013-03, Vol.81, p.58-62

2013

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Separation of surface accumulation and bulk neutral channel in junctionless transistors

Applied physics letters, 2014-06, Vol.104 (26)

2014

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Development of a CMOS Route for Electron Pumps to Be Used in Quantum Metrology

Technologies (Basel), 2016-03, Vol.4 (1), p.10

2016

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Aptasensors based on silicon nanowire field-effect transistors for electrical detection of thrombin

Microelectronic engineering, 2024-03, Vol.286, p.112130, Article 112130

2024

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Channel-Width-Dependent Mobility Degradation in Bulk Conduction Regime of Tri-Gate Junctionless Transistors

IEEE transactions on electron devices, 2022-06, Vol.69 (6), p.3037-3041

2022

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Impact of Channel Length on the Operation of Junctionless Transistors With Substrate Biasing

IEEE transactions on electron devices, 2021-06, Vol.68 (6), p.3070-3073

2021

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Channel width dependent subthreshold operation of tri-gate junctionless transistors

Solid-state electronics, 2020-09, Vol.171, p.107860, Article 107860

2020

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Controlling the Effective Channel Thickness of Junctionless Transistors by Substrate Bias

IEEE transactions on electron devices, 2020-11, Vol.67 (11), p.4736-4740

2020

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Impact of (Quasi-)Ballistic Transport on Operation of Complementary Metal--Oxide--Semiconductor Inverters Based on Fully-Depleted Silicon-on-Insulator and Nanowire Devices

Japanese Journal of Applied Physics, 2011-01, Vol.50 (1), p.014103-014103-7

2011

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Analytical Drain Current Compact Model in the Depletion Operation Region of Short-Channel Triple-Gate Junctionless Transistors

IEEE transactions on electron devices, 2017-01, Vol.64 (1), p.66-72

2017

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Impact of Hot Carrier Aging on the Performance of Triple-Gate Junctionless MOSFETs

IEEE transactions on electron devices, 2020-02, Vol.67 (2), p.424-429

2020

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Impact of series resistance on the operation of junctionless transistors

Solid-state electronics, 2017-03, Vol.129, p.103-107

2017

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Effect of Temperature on the Performance of Triple-Gate Junctionless Transistors

IEEE transactions on electron devices, 2018-08, Vol.65 (8), p.3562-3566

2018

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A New Method for Series Resistance Extraction of Nanometer MOSFETs

IEEE transactions on electron devices, 2017-07, Vol.64 (7), p.2797-2803

2017

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Origin of Low-Frequency Noise in Triple-Gate Junctionless n-MOSFETs

IEEE transactions on electron devices, 2018-12, Vol.65 (12), p.5481-5486

2018

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Back-gate effects and mobility characterization in junctionless transistor

Solid-state electronics, 2016-11, Vol.125, p.154-160

2016

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Methodology to separate channel conductions of two level vertically stacked SOI nanowire MOSFETs

Solid-state electronics, 2018-11, Vol.149, p.62-70

2018

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A Simple Method for Estimation of Silicon Film Thickness in Tri-Gate Junctionless Transistors

IEEE electron device letters, 2018-09, Vol.39 (9), p.1282-1285

2018

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Series resistance in different operation regime of junctionless transistors

Solid-state electronics, 2018-03, Vol.141, p.92-95

2018

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Gate-based high fidelity spin readout in a CMOS device

Low-temperature electrical characterization of junctionless transistors

Less mobility degradation induced by transverse electric-field in junctionless transistors

Strain-Induced Performance Enhancement of Trigate and Omega-Gate Nanowire FETs Scaled Down to 10-nm Width

Low-temperature operation of junctionless nanowire transistors: Less surface roughness scattering effects and dominant scattering mechanisms

Low-frequency noise behavior of junctionless transistors compared to inversion-mode transistors

Effects of channel width variation on electrical characteristics of tri-gate Junctionless transistors

Separation of surface accumulation and bulk neutral channel in junctionless transistors

Development of a CMOS Route for Electron Pumps to Be Used in Quantum Metrology

Aptasensors based on silicon nanowire field-effect transistors for electrical detection of thrombin

Channel-Width-Dependent Mobility Degradation in Bulk Conduction Regime of Tri-Gate Junctionless Transistors

Impact of Channel Length on the Operation of Junctionless Transistors With Substrate Biasing

Channel width dependent subthreshold operation of tri-gate junctionless transistors

Controlling the Effective Channel Thickness of Junctionless Transistors by Substrate Bias

Impact of (Quasi-)Ballistic Transport on Operation of Complementary Metal--Oxide--Semiconductor Inverters Based on Fully-Depleted Silicon-on-Insulator and Nanowire Devices

Analytical Drain Current Compact Model in the Depletion Operation Region of Short-Channel Triple-Gate Junctionless Transistors

Impact of Hot Carrier Aging on the Performance of Triple-Gate Junctionless MOSFETs

Impact of series resistance on the operation of junctionless transistors

Effect of Temperature on the Performance of Triple-Gate Junctionless Transistors

A New Method for Series Resistance Extraction of Nanometer MOSFETs

Origin of Low-Frequency Noise in Triple-Gate Junctionless n-MOSFETs

Back-gate effects and mobility characterization in junctionless transistor

Methodology to separate channel conductions of two level vertically stacked SOI nanowire MOSFETs

A Simple Method for Estimation of Silicon Film Thickness in Tri-Gate Junctionless Transistors

Series resistance in different operation regime of junctionless transistors

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