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A Distributed Rate-Control Approach to Reduce Communication Burdens in VSNs

IEEE access, 2023, Vol.11, p.1011-1022

2023

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A Study on the Impact of Multiview Distributed Feature Coding on a Multicamera Vehicle Tracking System at Roundabouts

IEEE access, 2022, Vol.10, p.39502-39517

2022

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Real Time LP Decoding of LDPC Codes for High Correction Performance Applications

IEEE wireless communications letters, 2016-12, Vol.5 (6), p.676-679

2016

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Multicore and Manycore Implementations of ADMM-based Decoders for LDPC Decoding

Journal of signal processing systems, 2018-11, Vol.90 (11), p.1551-1567

2018

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A survey on decoding schedules of LDPC convolutional codes and associated hardware architectures

2017 IEEE Symposium on Computers and Communications (ISCC), 2017, p.898-905

2017

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Comparison of different schedulings for the ADMM based LDPC decoding

2016 9th International Symposium on Turbo Codes and Iterative Information Processing (ISTC), 2016, p.51-55

2016

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ADMM hardware decoder for regular LDPC codes using a NISC-based architecture

2018 IEEE Wireless Communications and Networking Conference (WCNC), 2018, p.1-6

2018

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Implementation aspects of a pipeline ADMM-based LP decoding of LDPC convolutional codes

2018 IEEE Wireless Communications and Networking Conference (WCNC), 2018, p.1-6

2018

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Multicore implementation of LDPC decoders based on ADMM algorithm

2016 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), 2016, p.971-975

2016

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Deep Multi-modal Object Detection for Autonomous Driving

2021 18th International Multi-Conference on Systems, Signals & Devices (SSD), 2021, p.7-11

2021

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Feature-based Vehicle Tracking at Roundabouts in Visual Sensor Networks

2020 17th International Multi-Conference on Systems, Signals & Devices (SSD), 2020, p.167-172

2020

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Low Power Implementation of Decimation Filters in Multistandard Radio Receiver Using Optimized Multiplication-Accumulation Unit

2007 14th IEEE International Conference on Electronics, Circuits and Systems, 2007, p.1183-1186

2007

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Low power FPGA-based implementation of decimating filters for multistandard receiver

International Conference on Design and Test of Integrated Systems in Nanoscale Technology, 2006. DTIS 2006, 2006, p.10-14

2006

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Collaborative Interorganizational Relationships in a Project-Based Industry

Buildings (Basel), 2021-11, Vol.11 (11), p.502

2021

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A Distributed Rate-Control Approach to Reduce Communication Burdens in VSNs

A Study on the Impact of Multiview Distributed Feature Coding on a Multicamera Vehicle Tracking System at Roundabouts

Real Time LP Decoding of LDPC Codes for High Correction Performance Applications

Multicore and Manycore Implementations of ADMM-based Decoders for LDPC Decoding

A survey on decoding schedules of LDPC convolutional codes and associated hardware architectures

Comparison of different schedulings for the ADMM based LDPC decoding

ADMM hardware decoder for regular LDPC codes using a NISC-based architecture

Implementation aspects of a pipeline ADMM-based LP decoding of LDPC convolutional codes

Multicore implementation of LDPC decoders based on ADMM algorithm

Deep Multi-modal Object Detection for Autonomous Driving

Feature-based Vehicle Tracking at Roundabouts in Visual Sensor Networks

Low Power Implementation of Decimation Filters in Multistandard Radio Receiver Using Optimized Multiplication-Accumulation Unit

Low power FPGA-based implementation of decimating filters for multistandard receiver

Collaborative Interorganizational Relationships in a Project-Based Industry

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