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A Study on the Charge Trapping Characteristics of High-k Laminated Traps

IEEE electron device letters, 2019-09, Vol.40 (9), p.1427-1430

2019

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Novel STI Technology for Enhancing Reliability of High-k/Metal Gate DRAM

IEEE access, 2024, Vol.12, p.139427-139434

2024

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Highly Stackable 3D Capacitor-less DRAM for a High-performance Hybrid Memory

IEEE electron device letters, 2022-12, Vol.43 (12), p.1-1

2022

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String-level compact modeling of erase operations in the body-floated vertical channel of 3D charge trapping flash memory

Microelectronics, 2024-11, Vol.153, p.106423, Article 106423

2024

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String-level compact modeling for dynamic operation and transient analysis of 3D charge trapping flash memory

Solid-state electronics, 2023-06, Vol.204, p.108655, Article 108655

2023

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Novel Dual Work Function Buried Channel Array Transistor Process Design for Sub-17 nm DRAM

IEEE access, 2024, Vol.12, p.63049-63065

2024

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Effects of Channel Type and Doping on Hysteresis in Low-Temperature Poly-Si Thin-Film Transistors

IEEE transactions on electron devices, 2018-03, Vol.65 (3), p.986-994

2018

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A Study of High-Voltage p-Type MOSFET Degradation Under AC Stress

IEEE transactions on electron devices, 2015-09, Vol.62 (9), p.2940-2944

2015

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Effects of Polycrystalline Silicon Plug Defect on DRAM Characteristics

IEEE transactions on electron devices, 2023-07, Vol.70 (7), p.1-4

2023

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Suppression of Dislocations in DRAM STI Structure

IEEE transactions on electron devices, 2024-07, Vol.71 (7), p.4411-4414

2024

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Effect of field oxide structure on endurance characteristics of NAND flash memory

Electronics letters, 2014-05, Vol.50 (10), p.739-741

2014

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Electrical Performance and Reliability Enhancement of a-IGZO TFTs via Post-N2O Plasma Optimization

IEEE transactions on electron devices, 2023-07, Vol.70 (7), p.3611

2023

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Cost-Effective Silicon Vertical Diode Switch for Next-Generation Memory Devices

IEEE electron device letters, 2012-02, Vol.33 (2), p.242-244

2012

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Electrical Reliability of Flexible Low-Temperature Polycrystalline Oxide Thin-Film Transistors Under Mechanical Stress

IEEE transactions on electron devices, 2023-02, Vol.70 (2), p.527-531

2023

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High-Density 3-D NAND Cell Array Design With Hybrid Bonding

IEEE transactions on electron devices, 2023-11, Vol.70 (11), p.5638-5644

2023

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Bias stress instability of LTPS TFTs on flexible substrate with activation annealing temperature

Microelectronics and reliability, 2020-10, Vol.113, p.113940, Article 113940

2020

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Improvement of negative bias temperature instability of LTPS TFTs by high pressure H2O annealing

Microelectronics and reliability, 2021-01, Vol.116, p.113963, Article 113963

2021

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Nanoscale-doped dual-channel for improved performance and reliability of Hf: IGTO / a-IGTO thin film transistor

Materials science in semiconductor processing, 2024-06, Vol.176, p.108325, Article 108325

2024

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A Study on the Fluorine Effect of Direct Contact Process in High-Doped Boron Phosphorus Silicate Glass (BPSG)

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2013, 13(6), 54, pp.662-667

2013

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The Effects of Valence Band Offset on Threshold Voltage Shift in a-InGaZnO TFTs Under Negative Bias Illumination Stress

IEEE electron device letters, 2020-05, Vol.41 (5), p.1-1

2020

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Suppression of the Floating-Body Effect of Vertical-Cell DRAM With the Buried Body Engineering Method

IEEE transactions on electron devices, 2018-08, Vol.65 (8), p.3237-3242

2018

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Facile diffusion of sulfur and fluorine into a-IGTO thin films for high-performance and reliability of transparent amorphous oxide semiconductor thin-film transistors

Materials science in semiconductor processing, 2024-01, Vol.169, p.107872, Article 107872

2024

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A Study on the Electrical Characteristic Analysis of c-Si Solar Cell Diodes

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2012, 12(1), 45, pp.59-65

2012

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Novel Band-to-Band Tunneling Body Contact (BTBC) Structure to Suppress the Floating- Body Effect in a Vertical-Cell DRAM

IEEE electron device letters, 2018-12, Vol.39 (12), p.1860-1863

2018

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Low-Temperature Processed Complementary Inverter With Tin-Based Transparent Oxide Semiconductors

IEEE transactions on electron devices, 2023-10, Vol.70 (10), p.1-7

2023

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A Study on the Charge Trapping Characteristics of High-k Laminated Traps

Novel STI Technology for Enhancing Reliability of High-k/Metal Gate DRAM

Highly Stackable 3D Capacitor-less DRAM for a High-performance Hybrid Memory

String-level compact modeling of erase operations in the body-floated vertical channel of 3D charge trapping flash memory

String-level compact modeling for dynamic operation and transient analysis of 3D charge trapping flash memory

Novel Dual Work Function Buried Channel Array Transistor Process Design for Sub-17 nm DRAM

Effects of Channel Type and Doping on Hysteresis in Low-Temperature Poly-Si Thin-Film Transistors

A Study of High-Voltage p-Type MOSFET Degradation Under AC Stress

Effects of Polycrystalline Silicon Plug Defect on DRAM Characteristics

Suppression of Dislocations in DRAM STI Structure

Effect of field oxide structure on endurance characteristics of NAND flash memory

Electrical Performance and Reliability Enhancement of a-IGZO TFTs via Post-N2O Plasma Optimization

Cost-Effective Silicon Vertical Diode Switch for Next-Generation Memory Devices

Electrical Reliability of Flexible Low-Temperature Polycrystalline Oxide Thin-Film Transistors Under Mechanical Stress

High-Density 3-D NAND Cell Array Design With Hybrid Bonding

Bias stress instability of LTPS TFTs on flexible substrate with activation annealing temperature

Improvement of negative bias temperature instability of LTPS TFTs by high pressure H2O annealing

Nanoscale-doped dual-channel for improved performance and reliability of Hf: IGTO / a-IGTO thin film transistor

A Study on the Fluorine Effect of Direct Contact Process in High-Doped Boron Phosphorus Silicate Glass (BPSG)

The Effects of Valence Band Offset on Threshold Voltage Shift in a-InGaZnO TFTs Under Negative Bias Illumination Stress

Suppression of the Floating-Body Effect of Vertical-Cell DRAM With the Buried Body Engineering Method

Facile diffusion of sulfur and fluorine into a-IGTO thin films for high-performance and reliability of transparent amorphous oxide semiconductor thin-film transistors

A Study on the Electrical Characteristic Analysis of c-Si Solar Cell Diodes

Novel Band-to-Band Tunneling Body Contact (BTBC) Structure to Suppress the Floating- Body Effect in a Vertical-Cell DRAM

Low-Temperature Processed Complementary Inverter With Tin-Based Transparent Oxide Semiconductors

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