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Measuring Holding Voltage Related to Homogeneous Current Flow in Wide ESD Protection Structures Using Multilevel TLP

IEEE transactions on electron devices, 2011-02, Vol.58 (2), p.411-418

2011

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Characterization and Optimization of Sub-32-nm FinFET Devices for ESD Applications

IEEE transactions on electron devices, 2008-12, Vol.55 (12), p.3507-3516

2008

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Part I: On the Behavior of STI-Type DeNMOS Device Under ESD Conditions

IEEE transactions on electron devices, 2010-09, Vol.57 (9), p.2235-2242

2010

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Part II: On the Three-Dimensional Filamentation and Failure Modeling of STI Type DeNMOS Device Under Various ESD Conditions

IEEE transactions on electron devices, 2010-09, Vol.57 (9), p.2243-2250

2010

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An Insight Into the ESD Behavior of the Nanometer-Scale Drain-Extended NMOS Device-Part I: Turn-On Behavior of the Parasitic Bipolar

IEEE transactions on electron devices, 2011-02, Vol.58 (2), p.309-317

2011

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An Insight Into ESD Behavior of Nanometer-Scale Drain Extended NMOS (DeNMOS) Devices: Part II (Two-Dimensional Study-Biasing & Comparison With NMOS)

IEEE transactions on electron devices, 2011-02, Vol.58 (2), p.318-326

2011

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Reliability aspects of gate oxide under ESD pulse stress

2007 29th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), 2009, Vol.49 (12), p.6A.1-1-6A.1-10

2009

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Base pushout driven snapback in parasitic bipolar devices between different power domains

2004 IEEE International Reliability Physics Symposium. Proceedings, 2004, p.387-392

2004

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Cable discharges into communication interfaces

2006 Electrical Overstress/Electrostatic Discharge Symposium, 2006, p.144-151

2006

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Robust high current ESD performance of nano-meter scale DeNMOS by source ballasting

2010 IEEE International Reliability Physics Symposium, 2010, p.853-856

2010

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On the failure mechanism and current instabilities in RESURF type DeNMOS device under ESD conditions

2010 IEEE International Reliability Physics Symposium, 2010, p.841-845

2010

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Chip-level ESD simulation for fail detection and design guidance

2004 IEEE International Reliability Physics Symposium. Proceedings, 2004, p.603-604

2004

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A new physical insight and 3D device modeling of STI type denmos device failure under ESD conditions

2009 IEEE International Reliability Physics Symposium, 2009, p.669-675

2009

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Transient behavior of SCRS during ESD pulses

2008 IEEE International Reliability Physics Symposium, 2008, p.247-253

2008

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Highly resistive body STI NDeMOS: An optimized DeMOS device to achieve moving current filaments for robust ESD protection

2009 IEEE International Reliability Physics Symposium, 2009, p.754-759

2009

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3D device modeling of damage due to filamentation under an ESD event in nanometer scale drain extended NMOS (DE-NMOS)

2008 IEEE International Reliability Physics Symposium, 2008, p.639-640

2008

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On the differences between 3D filamentation and failure of N & P type drain extended MOS devices under ESD condition

2010 IEEE International Reliability Physics Symposium, 2010, p.480-484

2010

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Study of system ESD codesign of a realistic mobile board

EOS/ESD Symposium Proceedings, 2011, p.1-10

2011

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A Review on the ESD Robustness of Drain-Extended MOS Devices

IEEE transactions on device and materials reliability, 2012-12, Vol.12 (4), p.615-625

2012

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Advanced 2D/3D ESD device simulation-a powerful tool already used in a pre-Si phase

Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No.00TH8476), 2000, p.420-429

2000

Volltextzugriff (PDF)

Wide range control of the sustaining voltage of ESD protection elements realized in a smart power technology

Electrical Overstress/Electrostatic Discharge Symposium Proceedings. 1999 (IEEE Cat. No.99TH8396), 1999, p.19-27

1999

Volltextzugriff (PDF)

Novel devices in ESD protection

2007 International Workshop on Physics of Semiconductor Devices, 2007, p.80-85

2007

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ESD protection for the deep sub micron regime - a challenge for design methodology

17th International Conference on VLSI Design. Proceedings, 2004, p.809-818

Gossner, H.

2004

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An automated approach for verification of onchip interconnect resistance for electrostatic discharge paths

EOS/ESD Symposium Proceedings, 2011, p.1-8

2011

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Backside laserprober characterization of thermal effects during high current stress in smart power ESD protection devices

International Electron Devices Meeting 1998. Technical Digest (Cat. No.98CH36217), 1998, p.691-694

1998

Volltextzugriff (PDF)

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Measuring Holding Voltage Related to Homogeneous Current Flow in Wide ESD Protection Structures Using Multilevel TLP

Characterization and Optimization of Sub-32-nm FinFET Devices for ESD Applications

Part I: On the Behavior of STI-Type DeNMOS Device Under ESD Conditions

Part II: On the Three-Dimensional Filamentation and Failure Modeling of STI Type DeNMOS Device Under Various ESD Conditions

An Insight Into the ESD Behavior of the Nanometer-Scale Drain-Extended NMOS Device-Part I: Turn-On Behavior of the Parasitic Bipolar

An Insight Into ESD Behavior of Nanometer-Scale Drain Extended NMOS (DeNMOS) Devices: Part II (Two-Dimensional Study-Biasing & Comparison With NMOS)

Reliability aspects of gate oxide under ESD pulse stress

Base pushout driven snapback in parasitic bipolar devices between different power domains

Cable discharges into communication interfaces

Robust high current ESD performance of nano-meter scale DeNMOS by source ballasting

On the failure mechanism and current instabilities in RESURF type DeNMOS device under ESD conditions

Chip-level ESD simulation for fail detection and design guidance

A new physical insight and 3D device modeling of STI type denmos device failure under ESD conditions

Transient behavior of SCRS during ESD pulses

Highly resistive body STI NDeMOS: An optimized DeMOS device to achieve moving current filaments for robust ESD protection

3D device modeling of damage due to filamentation under an ESD event in nanometer scale drain extended NMOS (DE-NMOS)

On the differences between 3D filamentation and failure of N & P type drain extended MOS devices under ESD condition

Study of system ESD codesign of a realistic mobile board

A Review on the ESD Robustness of Drain-Extended MOS Devices

Advanced 2D/3D ESD device simulation-a powerful tool already used in a pre-Si phase

Wide range control of the sustaining voltage of ESD protection elements realized in a smart power technology

Novel devices in ESD protection

ESD protection for the deep sub micron regime - a challenge for design methodology

An automated approach for verification of onchip interconnect resistance for electrostatic discharge paths

Backside laserprober characterization of thermal effects during high current stress in smart power ESD protection devices

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