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RPL version number attacks: In-depth study

IEEE/IFIP Network Operations and Management Symposium, 2016, p.776-779

2016

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Model-based, fully simulated, system-level power consumption estimation of IoT devices

Microprocessors and microsystems, 2024-03, Vol.105, p.105009, Article 105009

2024

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Analysing the potential of transport triggered architecture for lattice-based cryptography algorithms

International journal of embedded systems, 2022, Vol.15 (5), p.404

2022

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Customizable embedded processor array for multimedia applications

Integration (Amsterdam), 2018-01, Vol.60, p.213-223

2018

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Instruction Extension of RV32I and GCC Back End for Ascon Lightweight Cryptography Algorithm

2021 IEEE International Conference on Omni-Layer Intelligent Systems (COINS), 2021, p.1-6

2021

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Hardware implementation of an elliptic curve processor over GF(p) with Montgomery modular multiplier

International journal of embedded systems, 2008, Vol.3 (4), p.229

2008

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Hardware architectures for public key cryptography

Integration (Amsterdam), 2003-05, Vol.34 (1), p.1-64

2003

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Design and implementation of a custom verification environment for fault injection and analysis on an embedded microprocessor

2015 Third International Conference on Technological Advances in Electrical, Electronics and Computer Engineering (TAEECE), 2015, p.256-261

2015

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Differential Power Analysis resistant hardware implementation of the RSA cryptosystem

2008 IEEE International Symposium on Circuits and Systems, 2008, p.3314-3317

2008

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Power-Analysis Attacks on an FPGA – First Experimental Results

Cryptographic Hardware and Embedded Systems - CHES 2003, 2003, p.35-50

2003

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Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure?

Cryptographic Hardware and Embedded Systems - CHES 2004, 2004, p.30-44

2004

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Power Analysis Attacks Against FPGA Implementations of the DES

Field Programmable Logic and Application, 2004, p.84-94

2004

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Power-analysis attack on an ASIC AES implementation

International Conference on Information Technology: Coding and Computing, 2004. Proceedings. ITCC 2004, 2004, Vol.2, p.546-552 Vol.2

2004

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Low-cost implementations of NTRU for pervasive security

2008 International Conference on Application-Specific Systems, Architectures and Processors, 2008, p.79-84

2008

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Serial multiplier architectures over GF(2/sup n/) for elliptic curve cryptosystems

Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference (IEEE Cat. No.04CH37521), 2004, Vol.2, p.779-782 Vol.2

2004

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Hardware implementation of an elliptic curve processor over GF(p)

Proceedings IEEE International Conference on Application-Specific Systems, Architectures, and Processors. ASAP 2003, 2003, p.433-443

2003

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RPL version number attacks: In-depth study

Model-based, fully simulated, system-level power consumption estimation of IoT devices

Analysing the potential of transport triggered architecture for lattice-based cryptography algorithms

Customizable embedded processor array for multimedia applications

Instruction Extension of RV32I and GCC Back End for Ascon Lightweight Cryptography Algorithm

Hardware implementation of an elliptic curve processor over GF(p) with Montgomery modular multiplier

Hardware architectures for public key cryptography

Design and implementation of a custom verification environment for fault injection and analysis on an embedded microprocessor

Differential Power Analysis resistant hardware implementation of the RSA cryptosystem

Power-Analysis Attacks on an FPGA – First Experimental Results

Power Analysis of an FPGA: Implementation of Rijndael: Is Pipelining a DPA Countermeasure?

Power Analysis Attacks Against FPGA Implementations of the DES

Power-analysis attack on an ASIC AES implementation

Low-cost implementations of NTRU for pervasive security

Serial multiplier architectures over GF(2/sup n/) for elliptic curve cryptosystems

Hardware implementation of an elliptic curve processor over GF(p)

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