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Considerations for Ultimate CMOS Scaling

IEEE transactions on electron devices, 2012-07, Vol.59 (7), p.1813-1828

Kuhn, K. J.

2012

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Impact strain engineering on gate stack quality and reliability

Solid-state electronics, 2008-08, Vol.52 (8), p.1115-1126

2008

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Experimental Comparison Between Trigate p-TFET and p-FinFET Analog Performance as a Function of Temperature

IEEE transactions on electron devices, 2013-08, Vol.60 (8), p.2493-2497

2013

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Numerical study on the combustion and emission characteristics of a methanol/diesel reactivity controlled compression ignition (RCCI) engine

Applied energy, 2013-06, Vol.106, p.184-197

2013

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Bipolar Charge-Plasma Transistor: A Novel Three Terminal Device

IEEE transactions on electron devices, 2012-04, Vol.59 (4), p.962-967

2012

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Optimized Silicon AWG With Flattened Spectral Response Using an MMI Aperture

Journal of lightwave technology, 2013-01, Vol.31 (1), p.87-93

2013

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A High-Temperature SiC Three-Phase AC-DC Converter Design for > 100 °C Ambient Temperature

IEEE transactions on power electronics, 2013, Vol.28 (1), p.555-572

2013

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Low-subthreshold-swing tunnel transistors

IEEE electron device letters, 2006-04, Vol.27 (4), p.297-300

2006

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Correlation of Scattering Loss, Sidewall Roughness and Waveguide Width in Silicon-on-Insulator (SOI) Ridge Waveguides

Journal of lightwave technology, 2009-09, Vol.27 (18), p.3999-4008

2009

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Scalability of Extremely Thin SOI (ETSOI) MOSFETs to Sub-20-nm Gate Length

IEEE electron device letters, 2012-02, Vol.33 (2), p.149-151

2012

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Comprehensive Analysis of Short-Channel Effects in Ultrathin SOI MOSFETs

IEEE transactions on electron devices, 2013-06, Vol.60 (6), p.1814-1819

2013

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Overview of the architecture, circuit design, and physical implementation of a first-generation cell processor

IEEE journal of solid-state circuits, 2006-01, Vol.41 (1), p.179-196

2006

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New High-Voltage ( > 1200 V) MOSFET With the Charge Trenches on Partial SOI

IEEE transactions on electron devices, 2008-07, Vol.55 (7), p.1756-1761

2008

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TCAD simulation of SOI TFETs and calibration of non-local band-to-band tunneling model

Microelectronic engineering, 2012-10, Vol.98, p.334-337

2012

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Universality of Short-Channel Effects in Undoped-Body Silicon Nanowire MOSFETs

IEEE electron device letters, 2010-09, Vol.31 (9), p.903-905

2010

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Fabrication of Photonic Wire and Crystal Circuits in Silicon-on-Insulator Using 193-nm Optical Lithography

Journal of lightwave technology, 2009-09, Vol.27 (18), p.4076-4083

2009

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A Tunnel Diode Body Contact Structure for High-Performance SOI MOSFETs

IEEE transactions on electron devices, 2012-01, Vol.59 (1), p.101-107

2012

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45-nm CMOS SOI Technology Characterization for Millimeter-Wave Applications

IEEE transactions on microwave theory and techniques, 2014-06, Vol.62 (6), p.1301-1311

2014

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Design of early fault detection technique for electrical assets using infrared thermograms

International journal of electrical power & energy systems, 2014-12, Vol.63, p.753-759

2014

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A Watt-Level Stacked-FET Linear Power Amplifier in Silicon-on-Insulator CMOS

IEEE transactions on microwave theory and techniques, 2010-01, Vol.58 (1), p.57-64

2010

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A Tunnel Diode Body Contact Structure to Suppress the Floating-Body Effect in Partially Depleted SOI MOSFETs

IEEE electron device letters, 2011-10, Vol.32 (10), p.1346-1348

2011

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Comparisons of hot-carrier degradation behavior in SOI-LIGBT and SOI-LDMOS with different stress conditions

Solid-state electronics, 2010-12, Vol.54 (12), p.1598-1601

2010

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A 40-Gb/s Optical Transceiver Front-End in 45 nm SOI CMOS

IEEE journal of solid-state circuits, 2012-03, Vol.47 (3), p.615-626

2012

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A physical compact DC drain current model for long-channel undoped ultra-thin body (UTB) SOI and asymmetric double-gate (DG) MOSFETs with independent gate operation

Solid-state electronics, 2011-03, Vol.57 (1), p.61-66

2011

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Physical Insight Toward Heat Transport and an Improved Electrothermal Modeling Framework for FinFET Architectures

IEEE transactions on electron devices, 2012-05, Vol.59 (5), p.1353-1363

2012

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Considerations for Ultimate CMOS Scaling

Impact strain engineering on gate stack quality and reliability

Experimental Comparison Between Trigate p-TFET and p-FinFET Analog Performance as a Function of Temperature

Numerical study on the combustion and emission characteristics of a methanol/diesel reactivity controlled compression ignition (RCCI) engine

Bipolar Charge-Plasma Transistor: A Novel Three Terminal Device

Optimized Silicon AWG With Flattened Spectral Response Using an MMI Aperture

A High-Temperature SiC Three-Phase AC-DC Converter Design for > 100 °C Ambient Temperature

Low-subthreshold-swing tunnel transistors

Correlation of Scattering Loss, Sidewall Roughness and Waveguide Width in Silicon-on-Insulator (SOI) Ridge Waveguides

Scalability of Extremely Thin SOI (ETSOI) MOSFETs to Sub-20-nm Gate Length

Comprehensive Analysis of Short-Channel Effects in Ultrathin SOI MOSFETs

Overview of the architecture, circuit design, and physical implementation of a first-generation cell processor

New High-Voltage ( > 1200 V) MOSFET With the Charge Trenches on Partial SOI

TCAD simulation of SOI TFETs and calibration of non-local band-to-band tunneling model

Universality of Short-Channel Effects in Undoped-Body Silicon Nanowire MOSFETs

Fabrication of Photonic Wire and Crystal Circuits in Silicon-on-Insulator Using 193-nm Optical Lithography

A Tunnel Diode Body Contact Structure for High-Performance SOI MOSFETs

45-nm CMOS SOI Technology Characterization for Millimeter-Wave Applications

Design of early fault detection technique for electrical assets using infrared thermograms

A Watt-Level Stacked-FET Linear Power Amplifier in Silicon-on-Insulator CMOS

A Tunnel Diode Body Contact Structure to Suppress the Floating-Body Effect in Partially Depleted SOI MOSFETs

Comparisons of hot-carrier degradation behavior in SOI-LIGBT and SOI-LDMOS with different stress conditions

A 40-Gb/s Optical Transceiver Front-End in 45 nm SOI CMOS

A physical compact DC drain current model for long-channel undoped ultra-thin body (UTB) SOI and asymmetric double-gate (DG) MOSFETs with independent gate operation

Physical Insight Toward Heat Transport and an Improved Electrothermal Modeling Framework for FinFET Architectures

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