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Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions

Semiconductor science and technology, 2007-01, Vol.22 (1), p.S177-S182

Yeo, Yee-Chia

2007

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Germanium-Tin P-Channel Tunneling Field-Effect Transistor: Device Design and Technology Demonstration

IEEE transactions on electron devices, 2013-12, Vol.60 (12), p.4048-4056

2013

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n-MOSFET With Silicon-Carbon Source/Drain for Enhancement of Carrier Transport

IEEE transactions on electron devices, 2007-02, Vol.54 (2), p.249-256

2007

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A Variational Approach to the Two-Dimensional Nonlinear Poisson's Equation for the Modeling of Tunneling Transistors

IEEE electron device letters, 2008-11, Vol.29 (11), p.1252-1255

2008

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Tunneling Field-Effect Transistor: Effect of Strain and Temperature on Tunneling Current

IEEE electron device letters, 2009-09, Vol.30 (9), p.981-983

2009

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Selenium Segregation for Effective Schottky Barrier Height Reduction in NiGe/n-Ge Contacts

IEEE electron device letters, 2012-06, Vol.33 (6), p.773-775

2012

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Phase-Change Random Access Memory With Multilevel Resistances Implemented Using a Dual Phase-Change Material Stack

IEEE transactions on electron devices, 2012-11, Vol.59 (11), p.2910-2916

2012

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Analysis of the Effects of Fringing Electric Field on FinFET Device Performance and Structural Optimization Using 3-D Simulation

IEEE transactions on electron devices, 2008-05, Vol.55 (5), p.1177-1184

2008

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Strained n-Channel FinFETs Featuring In Situ Doped Silicon-Carbon (\hbox\hbox) Source and Drain Stressors With High Carbon Content

IEEE transactions on electron devices, 2008-09, Vol.55 (9), p.2475-2483

2008

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Strain and Materials Engineering for the I-MOS Transistor With an Elevated Impact-Ionization Region

IEEE transactions on electron devices, 2007-10, Vol.54 (10), p.2778-2785

2007

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Performance Enhancement in Uniaxial Strained Silicon-on-Insulator N-MOSFETs Featuring Silicon-Carbon Source/Drain Regions

IEEE transactions on electron devices, 2007-11, Vol.54 (11), p.2910-2917

2007

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Contact Resistance Reduction for Strained N-MOSFETs With Silicon-Carbon Source/Drain Utilizing Aluminum Ion Implant and Aluminum Profile Engineering

IEEE transactions on electron devices, 2013-04, Vol.60 (4), p.1310-1317

2013

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A new robust non-local algorithm for band-to-band tunneling simulation and its application to Tunnel-FET

Solid-state electronics, 2011-03, Vol.57 (1), p.23-30

2011

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Sub-400 °C Si2H6 Passivation, HfO2 Gate Dielectric, and Single TaN Metal Gate: A Common Gate Stack Technology for In0.7Ga0.3As and Ge1-xSnx CMOS

IEEE transactions on electron devices, 2013-05, Vol.60 (5), p.1640-1648

2013

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Contact Technology for Strained nFinFETs With Silicon-Carbon Source/Drain Stressors Featuring Sulfur Implant and Segregation

IEEE transactions on electron devices, 2012-04, Vol.59 (4), p.1046-1055

2012

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Electrical characteristics of memory devices with a High-k HfO2 trapping layer and dual SiO2 /Si3N4 tunneling layer

IEEE transactions on electron devices, 2007-10, Vol.54 (10), p.2699-2705

2007

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Work Function Engineering Within a Single Metal Gate Stack: Manipulating Terbium- and Aluminum-Induced Interface Dipoles of Opposing Polarity

IEEE transactions on electron devices, 2009-03, Vol.56 (3), p.466-473

2009

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Platinum Germanosilicide as Source/Drain Contacts in P-Channel Fin Field-Effect Transistors (FinFETs)

IEEE transactions on electron devices, 2009-07, Vol.56 (7), p.1458-1465

2009

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Modeling study of the impact of surface roughness on silicon and Germanium UTB MOSFETs

IEEE transactions on electron devices, 2005-11, Vol.52 (11), p.2430-2439

2005

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Germanium Multiple-Gate Field-Effect Transistor With In Situ Boron-Doped Raised Source/Drain

IEEE transactions on electron devices, 2013-07, Vol.60 (7), p.2135-2141

2013

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Ultra High-Stress Liner Comprising Diamond-Like Carbon for Performance Enhancement of p-Channel Multiple-Gate Transistors

IEEE transactions on electron devices, 2009-06, Vol.56 (6), p.1277-1283

2009

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Sub-0.1-eV Effective Schottky-Barrier Height for NiSi on n-Type Si (100) Using Antimony Segregation

IEEE electron device letters, 2007-08, Vol.28 (8), p.703-705

2007

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Phase Change Liner Stressor for Strain Engineering of P-Channel FinFETs

IEEE transactions on electron devices, 2013-09, Vol.60 (9), p.2703-2711

2013

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High-Performance Germanium \Omega -Gate MuGFET With Schottky-Barrier Nickel Germanide Source/Drain and Low-Temperature Disilane-Passivated Gate Stack

IEEE electron device letters, 2012-10, Vol.33 (10), p.1336-1338

2012

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Novel Rare-Earth Dielectric Interlayers for Wide NMOS Work-Function Tunability in Ni-FUSI Gates

IEEE transactions on electron devices, 2008-09, Vol.55 (9), p.2370-2377

2008

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Enhancing CMOS transistor performance using lattice-mismatched materials in source/drain regions

Germanium-Tin P-Channel Tunneling Field-Effect Transistor: Device Design and Technology Demonstration

n-MOSFET With Silicon-Carbon Source/Drain for Enhancement of Carrier Transport

A Variational Approach to the Two-Dimensional Nonlinear Poisson's Equation for the Modeling of Tunneling Transistors

Tunneling Field-Effect Transistor: Effect of Strain and Temperature on Tunneling Current

Selenium Segregation for Effective Schottky Barrier Height Reduction in NiGe/n-Ge Contacts

Phase-Change Random Access Memory With Multilevel Resistances Implemented Using a Dual Phase-Change Material Stack

Analysis of the Effects of Fringing Electric Field on FinFET Device Performance and Structural Optimization Using 3-D Simulation

Strained n-Channel FinFETs Featuring In Situ Doped Silicon-Carbon (\hbox\hbox) Source and Drain Stressors With High Carbon Content

Strain and Materials Engineering for the I-MOS Transistor With an Elevated Impact-Ionization Region

Performance Enhancement in Uniaxial Strained Silicon-on-Insulator N-MOSFETs Featuring Silicon-Carbon Source/Drain Regions

Contact Resistance Reduction for Strained N-MOSFETs With Silicon-Carbon Source/Drain Utilizing Aluminum Ion Implant and Aluminum Profile Engineering

A new robust non-local algorithm for band-to-band tunneling simulation and its application to Tunnel-FET

Sub-400 °C Si2H6 Passivation, HfO2 Gate Dielectric, and Single TaN Metal Gate: A Common Gate Stack Technology for In0.7Ga0.3As and Ge1-xSnx CMOS

Contact Technology for Strained nFinFETs With Silicon-Carbon Source/Drain Stressors Featuring Sulfur Implant and Segregation

Electrical characteristics of memory devices with a High-k HfO2 trapping layer and dual SiO2 /Si3N4 tunneling layer

Work Function Engineering Within a Single Metal Gate Stack: Manipulating Terbium- and Aluminum-Induced Interface Dipoles of Opposing Polarity

Platinum Germanosilicide as Source/Drain Contacts in P-Channel Fin Field-Effect Transistors (FinFETs)

Modeling study of the impact of surface roughness on silicon and Germanium UTB MOSFETs

Germanium Multiple-Gate Field-Effect Transistor With In Situ Boron-Doped Raised Source/Drain

Ultra High-Stress Liner Comprising Diamond-Like Carbon for Performance Enhancement of p-Channel Multiple-Gate Transistors

Sub-0.1-eV Effective Schottky-Barrier Height for NiSi on n-Type Si (100) Using Antimony Segregation

Phase Change Liner Stressor for Strain Engineering of P-Channel FinFETs

High-Performance Germanium \Omega -Gate MuGFET With Schottky-Barrier Nickel Germanide Source/Drain and Low-Temperature Disilane-Passivated Gate Stack

Novel Rare-Earth Dielectric Interlayers for Wide NMOS Work-Function Tunability in Ni-FUSI Gates

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