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Design for High Reliability of CMOS IC With Tolerance on Total Ionizing Dose Effect

IEEE transactions on device and materials reliability, 2020-06, Vol.20 (2), p.459-467

2020

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IEEE_Xplore

How Flexible is CXL's Memory Protection?: Replacing a sledgehammer with a scalpel

ACM queue, 2023-06, Vol.21 (3), p.54-64

2023

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ESD Protection Designs: Topical Overview and Perspective

IEEE transactions on device and materials reliability, 2022-09, Vol.22 (3), p.356-370

2022

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IEEE_Xplore

Hemisphere's Vega 34 Board Uses Lyra II, Aquila

GPS world, 2022-03, Vol.33 (3), p.44

2022

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FPGAs in Client Compute Hardware

Communications of the ACM, 2022-08, Vol.65 (8), p.36

Mattioli, Michael

2022

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Quad 4-A regulator offers parallel output flexibility: in one surface-mount package, a micromodule with four 4-A switching regulators supports the multiple power needs of FPGAs, SoCs, ASICs, and other similar devices

Electronic design, 2014-03, Vol.62 (3), p.29

Davis, Sam

2014

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A Uniform Distributed RC Bandpass Network Gives More Than Unity Gain [Educator's Corner]

IEEE microwave magazine, 2023-02, Vol.24 (2), p.90-93

2023

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IEEE_Xplore

OEM

GPS world, 2019-01, Vol.30 (1), p.16

2019

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Fortinet unveils custom ASIC to boost firewall performance, efficiency

Network world, 2023-02

2023

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FPGA configuration via USB

ECN (Radnor, Pa.), 2011-11, Vol.55 (12), p.29

Dart, Fred

2011

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EMSpice: Physics-Based Electromigration Check Using Coupled Electronic and Stress Simulation

IEEE transactions on device and materials reliability, 2020-06, Vol.20 (2), p.376-389

2020

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IEEE_Xplore

The flip-chip approach for millimeter wave packaging

IEEE microwave magazine, 2005-09, Vol.6 (3), p.36-45

Heinrich, W.

2005

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IEEE_Xplore

Degradation and Reliability Modeling of EM Robustness of Voltage Regulators Based on ADT: An Approach and a Case Study

IEEE transactions on device and materials reliability, 2024-03, Vol.24 (1), p.2-13

2024

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IEEE_Xplore

New Low Offset Application Specific Integrated Circuit - With Hall Cell Sensing Elements for Closed Loop Current Transducers

Power electronics technology for engineers, designers and integrators, 2015-09

2015

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Build a Better, Faster, and Stronger Power Supervisor

Power electronics technology for engineers, designers and integrators, 2013-03

2013

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Neuromorphic Control: Designing Multiscale Mixed-Feedback Systems

IEEE control systems, 2021-12, Vol.41 (6), p.34-63

2021

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IEEE_Xplore

Analytical Modeling of Electromigration Failure for VLSI Interconnect Tree Considering Temperature and Segment Length Effects

IEEE transactions on device and materials reliability, 2017-12, Vol.17 (4), p.653-666

2017

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IEEE_Xplore

LOW-POWER CHIP Lets Robots Learn and Collaborate: This chip uses a hybrid digital-analog time-domain processor that encodes information in signals' pulse widths

Machine design, 2019-05, Vol.91 (5), p.10

2019

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Compact Modeling of MOSFET Wearout Mechanisms for Circuit-Reliability Simulation

IEEE transactions on device and materials reliability, 2008-03, Vol.8 (1), p.98-121

2008

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IEEE_Xplore

Postvoiding Stress Evolution in Confined Metal Lines

IEEE transactions on device and materials reliability, 2016-03, Vol.16 (1), p.50-60

2016

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IEEE_Xplore

Reliability-Aware Circuit Design Methodology for Beyond-5G Communication Systems

IEEE transactions on device and materials reliability, 2017-09, Vol.17 (3), p.490-506

2017

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IEEE_Xplore

Fast Scopes Benefit From Custom ASIC; This line of digital storage oscilloscopes features advanced processing power inside and unique triggering capabilities, capturing more signals than most instruments across capture bandwidths to 2 GHz

Microwaves & RF, 2011-10, Vol.50 (10)

2011

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Reliable Circuit Design Using a Fast Incremental-Based Gate Sizing Under Process Variation

IEEE transactions on device and materials reliability, 2022-09, Vol.22 (3), p.371-380

2022

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IEEE_Xplore

Pointers in Far Memory: A rethink of how data and computations should be organized

ACM queue, 2023-06, Vol.21 (3), p.75-93

2023

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The ASIC market faces a tough 2009

Electronic design, 2009-01, Vol.57 (1), p.46

Gawel, Richard

2009

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Design for High Reliability of CMOS IC With Tolerance on Total Ionizing Dose Effect

How Flexible is CXL's Memory Protection?: Replacing a sledgehammer with a scalpel

ESD Protection Designs: Topical Overview and Perspective

Hemisphere's Vega 34 Board Uses Lyra II, Aquila

FPGAs in Client Compute Hardware

Quad 4-A regulator offers parallel output flexibility: in one surface-mount package, a micromodule with four 4-A switching regulators supports the multiple power needs of FPGAs, SoCs, ASICs, and other similar devices

A Uniform Distributed RC Bandpass Network Gives More Than Unity Gain [Educator's Corner]

OEM

Fortinet unveils custom ASIC to boost firewall performance, efficiency

FPGA configuration via USB

EMSpice: Physics-Based Electromigration Check Using Coupled Electronic and Stress Simulation

The flip-chip approach for millimeter wave packaging

Degradation and Reliability Modeling of EM Robustness of Voltage Regulators Based on ADT: An Approach and a Case Study

New Low Offset Application Specific Integrated Circuit - With Hall Cell Sensing Elements for Closed Loop Current Transducers

Build a Better, Faster, and Stronger Power Supervisor

Neuromorphic Control: Designing Multiscale Mixed-Feedback Systems

Analytical Modeling of Electromigration Failure for VLSI Interconnect Tree Considering Temperature and Segment Length Effects

LOW-POWER CHIP Lets Robots Learn and Collaborate: This chip uses a hybrid digital-analog time-domain processor that encodes information in signals' pulse widths

Compact Modeling of MOSFET Wearout Mechanisms for Circuit-Reliability Simulation

Postvoiding Stress Evolution in Confined Metal Lines

Reliability-Aware Circuit Design Methodology for Beyond-5G Communication Systems

Fast Scopes Benefit From Custom ASIC; This line of digital storage oscilloscopes features advanced processing power inside and unique triggering capabilities, capturing more signals than most instruments across capture bandwidths to 2 GHz

Reliable Circuit Design Using a Fast Incremental-Based Gate Sizing Under Process Variation

Pointers in Far Memory: A rethink of how data and computations should be organized

The ASIC market faces a tough 2009

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