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The Role of Context for Object Detection and Semantic Segmentation in the Wild

2014 IEEE Conference on Computer Vision and Pattern Recognition, 2014, p.891-898

2014

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SRFeat: Single Image Super-Resolution with Feature Discrimination

Computer Vision – ECCV 2018, p.455-471

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Robustness to Device Degradation in Silicon FeFET-based Reservoir Computing (Invited)

2024 IEEE International Reliability Physics Symposium (IRPS), 2024, p.1-6

2024

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A 192-Gb 12-High 896-GB/s HBM3 DRAM with a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.444-446

2022

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Domain Adaptive Video Semantic Segmentation via Cross-Domain Moving Object Mixing

2023 IEEE/CVF Winter Conference on Applications of Computer Vision (WACV), 2023, p.489-498

2023

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Forensic Analysis of Apple CarPlay: A Case Study

Mobile Internet Security, p.289-300

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Multiphase Flow-Related Defects in Continuous Casting of Steel Slabs

TMS 2020 149th Annual Meeting & Exhibition Supplemental Proceedings, p.1161-1173

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Effect of Non-orthogonality in Dual-axis Gimbal on Rotational Inertial Navigation System

2023 13th International Conference on Indoor Positioning and Indoor Navigation (IPIN), 2023, p.1-5

2023

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Future Transformer for Long-term Action Anticipation

2022 IEEE/CVF Conference on Computer Vision and Pattern Recognition (CVPR), 2022, p.3042-3051

2022

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A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking

2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, p.204-206

2018

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Vertical cell array using TCAT(Terabit Cell Array Transistor) technology for ultra high density NAND flash memory

2009 Symposium on VLSI Technology, 2009, p.192-193

2009

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Classification of Hand Motions within EEG Signals for Non-Invasive BCI-Based Robot Hand Control

2018 IEEE International Conference on Systems, Man, and Cybernetics (SMC), 2018, p.515-518

2018

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9.6 A 6th-Order Quadrature CTDSM using Double-OTA and Quadrature NSSAR with 171.3dB FoMs in 14nm

2024 IEEE International Solid-State Circuits Conference (ISSCC), 2024, Vol.67, p.178-180

2024

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13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area Optimization

2024 IEEE International Solid-State Circuits Conference (ISSCC), 2024, Vol.67, p.238-240

2024

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Factorization Approach for Sparse Spatio-Temporal Brain-Computer Interface

2022 26th International Conference on Pattern Recognition (ICPR), 2022, p.1090-1097

2022

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A numerical model and validation of phase change material integrated thermoelectric radiant cooling panel

E3S Web of Conferences, 2019, Vol.111, p.1001

2019

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Decoding of Intuitive Visual Motion Imagery Using Convolutional Neural Network under 3D-BCI Training Environment

2020 IEEE International Conference on Systems, Man, and Cybernetics (SMC), 2020, p.2966-2971

2020

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A 1,024-Channel, 64-Interconnect, Capacitive Neural Interface Using a Cross-Coupled Microelectrode Array and 2-Dimensional Code-Division Multiplexing

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023, p.1-2

2023

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Representing Multicloud Security and Privacy Policies and Detecting Potential Problems

Service-Oriented Computing – ICSOC 2019 Workshops, p.57-68

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A Supply-Noise-Induced Jitter-Cancelling Clock Distribution Network for LPDDR5 Mobile DRAM featuring a 2nd-order Adaptive Filter

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.1-3

2022

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CONTENT OF VITAMIN C AND PHYSIOLOGICAL PROPERTIES OF BITTER GOURD CULTIVARS IN PLASTIC GREENHOUSE

Acta horticulturae, 2014 (1037), p.407-412

2014

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A Digital Dynamic Vision Sensor with SPAD Pixels and Multi-Event Generation for Motion/Vibration-Adaptive Detection

2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2024, p.1-2

2024

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16.2 A 76fsrms Jitter and -40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization

2019 IEEE International Solid- State Circuits Conference - (ISSCC), 2019, p.258-260

2019

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A Static Contention-Free Dual-Edge-Triggered Flip-Flop with Redundant Internal Node Transition Elimination for Ultra-Low-Power Applications

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023, p.1-2

2023

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A 5-GHz subharmonically injection-locked all-digital PLL with complementary switched injection

ESSCIRC Conference 2015 - 41st European Solid-State Circuits Conference (ESSCIRC), 2015, p.384-387

2015

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The Role of Context for Object Detection and Semantic Segmentation in the Wild

SRFeat: Single Image Super-Resolution with Feature Discrimination

Robustness to Device Degradation in Silicon FeFET-based Reservoir Computing (Invited)

A 192-Gb 12-High 896-GB/s HBM3 DRAM with a TSV Auto-Calibration Scheme and Machine-Learning-Based Layout Optimization

Domain Adaptive Video Semantic Segmentation via Cross-Domain Moving Object Mixing

Forensic Analysis of Apple CarPlay: A Case Study

Multiphase Flow-Related Defects in Continuous Casting of Steel Slabs

Effect of Non-orthogonality in Dual-axis Gimbal on Rotational Inertial Navigation System

Future Transformer for Long-term Action Anticipation

A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking

Vertical cell array using TCAT(Terabit Cell Array Transistor) technology for ultra high density NAND flash memory

Classification of Hand Motions within EEG Signals for Non-Invasive BCI-Based Robot Hand Control

9.6 A 6th-Order Quadrature CTDSM using Double-OTA and Quadrature NSSAR with 171.3dB FoMs in 14nm

13.4 A 48GB 16-High 1280GB/s HBM3E DRAM with All-Around Power TSV and a 6-Phase RDQS Scheme for TSV Area Optimization

Factorization Approach for Sparse Spatio-Temporal Brain-Computer Interface

A numerical model and validation of phase change material integrated thermoelectric radiant cooling panel

Decoding of Intuitive Visual Motion Imagery Using Convolutional Neural Network under 3D-BCI Training Environment

A 1,024-Channel, 64-Interconnect, Capacitive Neural Interface Using a Cross-Coupled Microelectrode Array and 2-Dimensional Code-Division Multiplexing

Representing Multicloud Security and Privacy Policies and Detecting Potential Problems

A Supply-Noise-Induced Jitter-Cancelling Clock Distribution Network for LPDDR5 Mobile DRAM featuring a 2nd-order Adaptive Filter

CONTENT OF VITAMIN C AND PHYSIOLOGICAL PROPERTIES OF BITTER GOURD CULTIVARS IN PLASTIC GREENHOUSE

A Digital Dynamic Vision Sensor with SPAD Pixels and Multi-Event Generation for Motion/Vibration-Adaptive Detection

16.2 A 76fsrms Jitter and -40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization

A Static Contention-Free Dual-Edge-Triggered Flip-Flop with Redundant Internal Node Transition Elimination for Ultra-Low-Power Applications

A 5-GHz subharmonically injection-locked all-digital PLL with complementary switched injection

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