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A 2.9 ps equivalent resolution interpolating time counter based on multiple independent coding lines

Measurement science & technology, 2013-03, Vol.24 (3), p.35904-1-15

2013

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Low-jitter wide-range integrated time interval/delay generator based on combination of period counting and capacitor charging

Review of scientific instruments, 2015-02, Vol.86 (2)

2015

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Picosecond-precision multichannel autonomous time and frequency counter

Review of scientific instruments, 2017-12, Vol.88 (12)

2017

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A 7.5 ps single-shot precision integrated time counter with segmented delay line

Review of scientific instruments, 2014-03, Vol.85 (3)

2014

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Quantization error in precision time counters

Measurement science & technology, 2015-07, Vol.26 (7), p.75002-13

2015

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Auto-tuned counter synchronisation in FPGA-based interpolation time digitisers

Electronics letters, 2009, Vol.45 (13), p.671-672

SZPLET, R

2009

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Permanently calibrated interpolating time counter

Measurement science & technology, 2015-01, Vol.26 (1), p.15006-8

2015

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A 45 ps time digitizer with a two-phase clock and dual-edge two-stage interpolation in a field programmable gate array device

Measurement science & technology, 2009-02, Vol.20 (2), p.025108-025108 (11)

2009

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Interpolating time counter with 100 ps resolution on a single FPGA device

IEEE transactions on instrumentation and measurement, 2000-08, Vol.49 (4), p.879-883

2000

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Auto-tuned counter synchronisation in FPGA-based interpolation time digitisers

Electronics letters, 2009-06, Vol.45 (13), p.1-1

Szplet, R

2009

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Field-programmable-gate-array-based time-to-digital converter with 200-ps resolution

IEEE transactions on instrumentation and measurement, 1997-02, Vol.46 (1), p.51-55

1997

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Single-chip interpolating time counter with 200-ps resolution and 43-s range

IEEE transactions on instrumentation and measurement, 1997-08, Vol.46 (4), p.851-856

1997

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Nonlinearity correction of the integrated time-to-digital converter with direct coding

IEEE transactions on instrumentation and measurement, 1997-04, Vol.46 (2), p.449-453

1997

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Delay-locked loop technique for temperature stabilisation of internal delays of CMOS FPGA devices

Electronics letters, 2000-07, Vol.36 (14), p.1184-1185

2000

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Time-to-digital converter with direct coding and 100 ps resolution

Electronics letters, 1995-09, Vol.31 (19), p.1658-1659

1995

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Delay-locked loop technique for temperature stabilisation of internal delays of CMOS FPGA devices

Electronics letters, 2000-07, Vol.36 (14), p.1-1

2000

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Single-chip low-cost time counter for distance measurements with 3 cm resolution

Journal of optics, 1998-06, Vol.29 (3), p.199-205

1998

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Single-chip low-cost time counter for distance measurements with 3 cm resolution: Optoelectronic distance/displacement measurements and applications

Journal of optics, 1998, Vol.29 (3), p.199-205

1998

Volltextzugriff (PDF)

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A 2.9 ps equivalent resolution interpolating time counter based on multiple independent coding lines

Low-jitter wide-range integrated time interval/delay generator based on combination of period counting and capacitor charging

Picosecond-precision multichannel autonomous time and frequency counter

A 7.5 ps single-shot precision integrated time counter with segmented delay line

Quantization error in precision time counters

Auto-tuned counter synchronisation in FPGA-based interpolation time digitisers

Permanently calibrated interpolating time counter

A 45 ps time digitizer with a two-phase clock and dual-edge two-stage interpolation in a field programmable gate array device

Interpolating time counter with 100 ps resolution on a single FPGA device

Auto-tuned counter synchronisation in FPGA-based interpolation time digitisers

Field-programmable-gate-array-based time-to-digital converter with 200-ps resolution

Single-chip interpolating time counter with 200-ps resolution and 43-s range

Nonlinearity correction of the integrated time-to-digital converter with direct coding

Delay-locked loop technique for temperature stabilisation of internal delays of CMOS FPGA devices

Time-to-digital converter with direct coding and 100 ps resolution

Delay-locked loop technique for temperature stabilisation of internal delays of CMOS FPGA devices

Single-chip low-cost time counter for distance measurements with 3 cm resolution

Single-chip low-cost time counter for distance measurements with 3 cm resolution: Optoelectronic distance/displacement measurements and applications

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