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A compact model for tunnel field-effect transistors incorporating nonlocal band-to-band tunneling

Journal of applied physics, 2013-10, Vol.114 (14)

2013

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Toward Long-Coherence-Time Si Spin Qubit: The Origin of Low-Frequency Noise in Cryo-CMOS

2020 IEEE Symposium on VLSI Technology, 2020, p.1-2

2020

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CVD Growth Technologies of Layered MX2 Materials for Real LSI Applications-Position and Growth Direction Control and Gas Source Synthesis

IEEE journal of the Electron Devices Society, 2018-01, Vol.6, p.1159-1163

2018

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AFM measurement of atomic-scale Si surface etching by active oxidation

Surface science, 2010-08, Vol.604 (17), p.1432-1437

2010

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Analytic model of direct tunnel current through ultrathin gate oxides

Journal of applied physics, 2000-03, Vol.87 (6), p.3000-3005

2000

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Impact of fin length on threshold voltage modulation by back bias for Independent double-gate tunnel fin field-effect transistors

Solid-state electronics, 2015-09, Vol.111, p.62-66

2015

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Exact control of junction position using epitaxial NiSi2 crystallization in ultrathin silicon-on-insulator metal-oxide-semiconductor field-effect transistors

AIP advances, 2012-09, Vol.2 (3), p.032126-032126-5

2012

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(Invited) Charge Trapping Type SOI-FinFET Flash Memory

ECS transactions, 2014, Vol.61 (2), p.263-280

2014

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Unified analytic model of direct and Fowler–Nordheim tunnel currents through ultrathin gate oxides

Applied physics letters, 2000-11, Vol.77 (22), p.3580-3582

2000

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Limit of gate oxide thickness scaling in MOSFETs due to apparent threshold voltage fluctuation induced by tunnel leakage current

IEEE transactions on electron devices, 2001-02, Vol.48 (2), p.259-264

2001

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Advantages of HfAlON gate dielectric film for advanced low power CMOS application

Microelectronic engineering, 2005-06, Vol.80, p.190-197

2005

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Variation behavior of tunnel-FETs originated from dopant concentration at source region and channel edge configuration

2014 44th European Solid State Device Research Conference (ESSDERC), 2014, p.278-281

2014

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Re-examination of Flat-Band Voltage Shift for High-k MOS Devices

2007 IEEE Symposium on VLSI Technology, 2007, p.70-71

2007

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Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations

2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC), 2013, p.45-48

2013

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Analysis of Vth flexibility in ultrathin-BOX SOI FinFETs

2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 2013, p.1-2

2013

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Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes

2013 Proceedings of the European Solid-State Device Research Conference (ESSDERC), 2013, p.202-205

2013

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Quantification of Spin Drift in Devices with a Heavily Doped Si Channel

Physical review applied, 2019-04, Vol.11 (4), Article 044020

2019

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Statistical analysis of soft and hard breakdown in 1.9-4.8-nm-thick gate oxides

IEEE electron device letters, 2004-05, Vol.25 (5), p.305-307

2004

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Fundamental limit of gate oxide thickness scaling in advanced MOSFETs

Semiconductor science and technology, 2000-05, Vol.15 (5), p.485-490

2000

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Decomposition of On-Current Variability of nMOS FinFETs for Prediction Beyond 20 nm

IEEE transactions on electron devices, 2012-08, Vol.59 (8), p.2003-2010

2012

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Performance and Reliability Improvement in Ge nMOSFETs with Different Surface Orientations through Channel Flattening Process

2020 4th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 2020, p.1-4

2020

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Suppression of threshold voltage variability of double-gate fin field-effect transistors using amorphous metal gate with uniform work function

Applied physics letters, 2013-04, Vol.102 (16)

2013

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Fin-Height Effect on Poly-Si/PVD-TiN Stacked-Gate FinFET Performance

IEEE transactions on electron devices, 2012-03, Vol.59 (3), p.647-653

2012

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Highly V sub(t) tunable and low variability triangular fin-channel MOSFETs on SOTB

Microelectronic engineering, 2015-11, Vol.147, p.290-293

2015

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CVD Growth Technologies of Layered MX 2 Materials for Real LSI Applications—Position and Growth Direction Control and Gas Source Synthesis

IEEE journal of the Electron Devices Society, 2018, Vol.6, p.1159-1163

2018

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A compact model for tunnel field-effect transistors incorporating nonlocal band-to-band tunneling

Toward Long-Coherence-Time Si Spin Qubit: The Origin of Low-Frequency Noise in Cryo-CMOS

CVD Growth Technologies of Layered MX2 Materials for Real LSI Applications-Position and Growth Direction Control and Gas Source Synthesis

AFM measurement of atomic-scale Si surface etching by active oxidation

Analytic model of direct tunnel current through ultrathin gate oxides

Impact of fin length on threshold voltage modulation by back bias for Independent double-gate tunnel fin field-effect transistors

Exact control of junction position using epitaxial NiSi2 crystallization in ultrathin silicon-on-insulator metal-oxide-semiconductor field-effect transistors

(Invited) Charge Trapping Type SOI-FinFET Flash Memory

Unified analytic model of direct and Fowler–Nordheim tunnel currents through ultrathin gate oxides

Limit of gate oxide thickness scaling in MOSFETs due to apparent threshold voltage fluctuation induced by tunnel leakage current

Advantages of HfAlON gate dielectric film for advanced low power CMOS application

Variation behavior of tunnel-FETs originated from dopant concentration at source region and channel edge configuration

Re-examination of Flat-Band Voltage Shift for High-k MOS Devices

Performance limit of parallel electric field tunnel FET and improvement by modified gate and channel configurations

Analysis of Vth flexibility in ultrathin-BOX SOI FinFETs

Guidelines for symmetric threshold voltage in tunnel FinFETs with single and dual metal gate electrodes

Quantification of Spin Drift in Devices with a Heavily Doped Si Channel

Statistical analysis of soft and hard breakdown in 1.9-4.8-nm-thick gate oxides

Fundamental limit of gate oxide thickness scaling in advanced MOSFETs

Decomposition of On-Current Variability of nMOS FinFETs for Prediction Beyond 20 nm

Performance and Reliability Improvement in Ge nMOSFETs with Different Surface Orientations through Channel Flattening Process

Suppression of threshold voltage variability of double-gate fin field-effect transistors using amorphous metal gate with uniform work function

Fin-Height Effect on Poly-Si/PVD-TiN Stacked-Gate FinFET Performance

Highly V sub(t) tunable and low variability triangular fin-channel MOSFETs on SOTB

CVD Growth Technologies of Layered MX 2 Materials for Real LSI Applications—Position and Growth Direction Control and Gas Source Synthesis

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