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Hybrid-orientation technology (HOT): opportunities and challenges

IEEE transactions on electron devices, 2006-05, Vol.53 (5), p.965-978

2006

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Kerf-Less Removal of Si, Ge, and III-V Layers by Controlled Spalling to Enable Low-Cost PV Technologies

IEEE journal of photovoltaics, 2012-04, Vol.2 (2), p.141-147

2012

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Mobility Scaling in Short-Channel Length Strained Ge-on-Insulator P-MOSFETs

IEEE electron device letters, 2008-07, Vol.29 (7), p.811-813

2008

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Threshold voltage control in NiSi-gated MOSFETs through SIIS

IEEE transactions on electron devices, 2005-01, Vol.52 (1), p.39-46

2005

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Metal-oxide based, CMOS-compatible ECRAM for Deep Learning Accelerator

2019 IEEE International Electron Devices Meeting (IEDM), 2019, p.35.7.1-35.7.4

2019

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High- \kappa/Metal-Gate Fully Depleted SOI CMOS With Single-Silicide Schottky Source/Drain With Sub-30-nm Gate Length

IEEE electron device letters, 2010-04, Vol.31 (4), p.275-277

2010

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High-k/Metal-Gate Fully Depleted SOI CMOS With Single-Silicide Schottky Source/Drain With Sub-30-nm Gate Length

IEEE electron device letters, 2010-04, Vol.31 (4), p.275-277

2010

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Hole confinement and low-frequency noise in SiGe pFETs on silicon-on-sapphire

IEEE electron device letters, 1999-04, Vol.20 (4), p.173-175

1999

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Strained Si1−xGex-on-insulator PMOS FinFETs with excellent sub-threshold leakage, extremely-high short-channel performance and source injection velocity for 10nm node and beyond

2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers, 2014, p.1-2

2014

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Measurement and analysis of gate-induced drain leakage in short-channel strained silicon germanium-on-insulator pMOS FinFETs

72nd Device Research Conference, 2014, p.183-184

2014

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Demonstration of record SiGe transconductance and short-channel current drive in High-Ge-Content SiGe PMOS FinFETs with improved junction and scaled EOT

2016 IEEE Symposium on VLSI Technology, 2016, p.1-2

2016

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Mobility Scaling in Short-Channel Length Strained Ge-on-Insulator P-MOSFETs

IEEE electron device letters, 2008, Vol.29 (7), p.808-810

2008

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High-[Formula Omitted]/Metal-Gate Fully Depleted SOI CMOS With Single-Silicide Schottky Source/Drain With Sub-30-nm Gate Length

IEEE electron device letters, 2010-04, Vol.31 (4), p.275

2010

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Electrical characterization of wafer-scale epitaxial graphene and its RF applications

2011 IEEE MTT-S International Microwave Symposium, 2011, p.1-4

2011

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Investigation of CMOS devices with embedded SiGe source/drain on hybrid orientation substrates

Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005, 2005, p.28-29

2005

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High performance PMOS with strained high-Ge-content SiGe fins for advanced logic applications

2017 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA), 2017, p.1-2

2017

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High-Q magnetic inductors for high efficiency on-chip power conversion

2016 IEEE International Electron Devices Meeting (IEDM), 2016, p.35.3.1-35.3.4

2016

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First demonstration of high-Ge-content strained-Si1−xGex (x=0.5) on insulator PMOS FinFETs with high hole mobility and aggressively scaled fin dimensions and gate lengths for high-performance applications

2014 IEEE International Electron Devices Meeting, 2014, p.16.1.1-16.1.4

2014

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High mobility p-channel germanium MOSFETs with a thin Ge oxynitride gate dielectric

Digest. International Electron Devices Meeting, 2002, p.441-444

2002

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Selectively formed high mobility strained Ge PMOSFETs for high performance CMOS

IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004, 2004, p.157-160

2004

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High performance cmos bulk technology using direct silicon bond (dsb) mixed crystal orientation substrates

IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest, 2005, p.225-228

2005

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Hole confinement and its impact on low-frequency noise in SiGe pFETs on sapphire

International Electron Devices Meeting. IEDM Technical Digest, 1997, p.815-818

1997

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Histotripsy Ablation in Preclinical Animal Models of Cancer and Spontaneous Tumors in Veterinary Patients: A Review

IEEE transactions on ultrasonics, ferroelectrics, and frequency control, 2022-01, Vol.69 (1), p.5-26

2022

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Spacecraft Charging Related Risk of Floating Connector Pins

IEEE transactions on plasma science, 2018-01, Vol.46 (1), p.201-206

2018

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General-Purpose, Parallel and Reversible Microfluidic Interconnects

IEEE transactions on components, packaging, and manufacturing technology (2011), 2015-03, Vol.5 (3), p.291-300

2015

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Hybrid-orientation technology (HOT): opportunities and challenges

Kerf-Less Removal of Si, Ge, and III-V Layers by Controlled Spalling to Enable Low-Cost PV Technologies

Mobility Scaling in Short-Channel Length Strained Ge-on-Insulator P-MOSFETs

Threshold voltage control in NiSi-gated MOSFETs through SIIS

Metal-oxide based, CMOS-compatible ECRAM for Deep Learning Accelerator

High- \kappa/Metal-Gate Fully Depleted SOI CMOS With Single-Silicide Schottky Source/Drain With Sub-30-nm Gate Length

High-k/Metal-Gate Fully Depleted SOI CMOS With Single-Silicide Schottky Source/Drain With Sub-30-nm Gate Length

Hole confinement and low-frequency noise in SiGe pFETs on silicon-on-sapphire

Strained Si1−xGex-on-insulator PMOS FinFETs with excellent sub-threshold leakage, extremely-high short-channel performance and source injection velocity for 10nm node and beyond

Measurement and analysis of gate-induced drain leakage in short-channel strained silicon germanium-on-insulator pMOS FinFETs

Demonstration of record SiGe transconductance and short-channel current drive in High-Ge-Content SiGe PMOS FinFETs with improved junction and scaled EOT

Mobility Scaling in Short-Channel Length Strained Ge-on-Insulator P-MOSFETs

High-[Formula Omitted]/Metal-Gate Fully Depleted SOI CMOS With Single-Silicide Schottky Source/Drain With Sub-30-nm Gate Length

Electrical characterization of wafer-scale epitaxial graphene and its RF applications

Investigation of CMOS devices with embedded SiGe source/drain on hybrid orientation substrates

High performance PMOS with strained high-Ge-content SiGe fins for advanced logic applications

High-Q magnetic inductors for high efficiency on-chip power conversion

First demonstration of high-Ge-content strained-Si1−xGex (x=0.5) on insulator PMOS FinFETs with high hole mobility and aggressively scaled fin dimensions and gate lengths for high-performance applications

High mobility p-channel germanium MOSFETs with a thin Ge oxynitride gate dielectric

Selectively formed high mobility strained Ge PMOSFETs for high performance CMOS

High performance cmos bulk technology using direct silicon bond (dsb) mixed crystal orientation substrates

Hole confinement and its impact on low-frequency noise in SiGe pFETs on sapphire

Histotripsy Ablation in Preclinical Animal Models of Cancer and Spontaneous Tumors in Veterinary Patients: A Review

Spacecraft Charging Related Risk of Floating Connector Pins

General-Purpose, Parallel and Reversible Microfluidic Interconnects

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