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Make3D: Learning 3D Scene Structure from a Single Still Image

IEEE transactions on pattern analysis and machine intelligence, 2009-05, Vol.31 (5), p.824-840

2009

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A 4.0 GHz 291 Mb Voltage-Scalable SRAM Design in a 32 nm High-k + Metal-Gate CMOS Technology With Integrated Power Management

IEEE journal of solid-state circuits, 2010-01, Vol.45 (1), p.103-110

2010

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Localized Generalization Error Model and Its Application to Architecture Selection for Radial Basis Function Neural Network

IEEE transactions on neural networks, 2007-09, Vol.18 (5), p.1294-1305

2007

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Vertically Stacked Silicon Nanowire Transistors Fabricated by Inductive Plasma Etching and Stress-Limited Oxidation

IEEE electron device letters, 2009-05, Vol.30 (5), p.520-522

2009

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Uplink Channel Estimation for Multiuser Fiber-Wireless Systems Using Ternary Signals

IEEE communications letters, 2012-10, Vol.16 (10), p.1672-1675

2012

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Memory characteristics of MOSFETs with densely stacked silicon nanocrystal Layers in the gate oxide synthesized by low-energy ion beam

IEEE electron device letters, 2006-04, Vol.27 (4), p.231-233

2006

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Costas CW frequency hopping radar waveform: peak sidelobe improvement using Golay complementary sequences

Electronics letters, 2010, Vol.46 (2), p.169-170

2010

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Miniaturized acceleration sensors with in- plane polarized piezoelectric thin films produced by micromachining

IEEE transactions on ultrasonics, ferroelectrics, and frequency control, 2011-11, Vol.58 (11), p.2289-2296

2011

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Impact of programming mechanisms on the performance and reliability of nonvolatile memory devices based on Si nanocrystals

IEEE transactions on electron devices, 2006-04, Vol.53 (4), p.663-667

2006

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Block-based fuzzy step size NLMS algorithms for subband adaptive channel equalisation

IET signal processing, 2009, Vol.3 (1), p.23-32

2009

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On sub-band adaptive chip equalisation for direct sequence code division multiple access downlink over dispersive channels

IET communications, 2007-08, Vol.1 (4), p.802-809

2007

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Operational Shock Simulation of the Head-Disk Assembly of a Small-Form Factor Drive

IEEE transactions on magnetics, 2007-11, Vol.43 (11), p.4042-4047

2007

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Influence of Si-nanocrystal distribution in the oxide on the charging behavior of MOS structures

IEEE transactions on electron devices, 2006-04, Vol.53 (4), p.914-917

2006

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Influence of Si nanocrystal distributed in the gate oxide on the MOS capacitance

IEEE transactions on electron devices, 2006-04, Vol.53 (4), p.730-736

2006

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A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-Κ Metal-Gate CMOS Technology

2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, 2008, p.376-621

2008

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Imbalanced High-Frequency Number Classification Based on DSUS

2018 International Conference on Machine Learning and Cybernetics (ICMLC), 2018, Vol.1, p.19-24

2018

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License Plate Recognition in Diversified Situations Using Robust L-GEM-Based RBFNN

2019 International Conference on Wavelet Analysis and Pattern Recognition (ICWAPR), 2019, p.1-7

2019

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Si ion-induced instability in flatband voltage of Si+-implanted gate oxides

IEEE transactions on electron devices, 2006-05, Vol.53 (5), p.1280-1282

2006

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Design and experimental technology for 0.1-μm gate-length low-temperature operation FET's

IEEE electron device letters, 1987, Vol.8 (10), p.463-466

1987

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Effect of bending methods on FBG lateral force sensor

Electronics letters, 2005, Vol.41 (23), p.1270-1271

2005

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An 18-Mb, 12.3-GB/s CMOS pipeline-burst cache SRAM with 1.54 Gb/s/pin

IEEE journal of solid-state circuits, 1999-11, Vol.34 (11), p.1564-1570

1999

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Microprocessor-Based PWM Inverter Using Modified Regular Sampling Techniques

IEEE transactions on industry applications, 1986-03, Vol.IA-22 (2), p.286-292

1986

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Inverter performance of deep-submicrometer MOSFETs

IEEE electron device letters, 1988-12, Vol.9 (12), p.633-635

1988

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Embedded program testing in untestable mobile environment: an experience of trustworthiness approach

11th Asia-Pacific Software Engineering Conference, 2004, p.430-437

2004

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Quantitative study on effect of center selection to RBFNN classification performance

2004 IEEE International Conference on Systems, Man and Cybernetics (IEEE Cat. No.04CH37583), 2004, Vol.4, p.3692-3697 vol.4

2004

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Make3D: Learning 3D Scene Structure from a Single Still Image

A 4.0 GHz 291 Mb Voltage-Scalable SRAM Design in a 32 nm High-k + Metal-Gate CMOS Technology With Integrated Power Management

Localized Generalization Error Model and Its Application to Architecture Selection for Radial Basis Function Neural Network

Vertically Stacked Silicon Nanowire Transistors Fabricated by Inductive Plasma Etching and Stress-Limited Oxidation

Uplink Channel Estimation for Multiuser Fiber-Wireless Systems Using Ternary Signals

Memory characteristics of MOSFETs with densely stacked silicon nanocrystal Layers in the gate oxide synthesized by low-energy ion beam

Costas CW frequency hopping radar waveform: peak sidelobe improvement using Golay complementary sequences

Miniaturized acceleration sensors with in- plane polarized piezoelectric thin films produced by micromachining

Impact of programming mechanisms on the performance and reliability of nonvolatile memory devices based on Si nanocrystals

Block-based fuzzy step size NLMS algorithms for subband adaptive channel equalisation

On sub-band adaptive chip equalisation for direct sequence code division multiple access downlink over dispersive channels

Operational Shock Simulation of the Head-Disk Assembly of a Small-Form Factor Drive

Influence of Si-nanocrystal distribution in the oxide on the charging behavior of MOS structures

Influence of Si nanocrystal distributed in the gate oxide on the MOS capacitance

A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-Κ Metal-Gate CMOS Technology

Imbalanced High-Frequency Number Classification Based on DSUS

License Plate Recognition in Diversified Situations Using Robust L-GEM-Based RBFNN

Si ion-induced instability in flatband voltage of Si+-implanted gate oxides

Design and experimental technology for 0.1-μm gate-length low-temperature operation FET's

Effect of bending methods on FBG lateral force sensor

An 18-Mb, 12.3-GB/s CMOS pipeline-burst cache SRAM with 1.54 Gb/s/pin

Microprocessor-Based PWM Inverter Using Modified Regular Sampling Techniques

Inverter performance of deep-submicrometer MOSFETs

Embedded program testing in untestable mobile environment: an experience of trustworthiness approach

Quantitative study on effect of center selection to RBFNN classification performance

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