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Multi-VT UTBB FDSOI Device Architectures for Low-Power CMOS Circuit

IEEE transactions on electron devices, 2011, Vol.58 (8), p.2473-2482

2011

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Impact of back biasing on carrier transport in ultra-thin-body and BOX (UTBB) Fully Depleted SOI MOSFETs

2012 Symposium on VLSI Technology (VLSIT), 2012, p.113-114

2012

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Comprehensive Evaluation of Junctionless and Inversion-Mode Nanowire MOSFETs Performance at High Temperatures

IEEE journal of the Electron Devices Society, 2024-06, p.1-1

2024

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Foreword

Solid-state electronics, 2011-05, Vol.59 (1), p.1

2011

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Experimental developments of A2RAM memory cells on SOI and bulk substrates

Solid-state electronics, 2015-01, Vol.103, p.7-14

2015

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Study of silicon n- and p-FET SOI nanowires concerning analog performance down to 100K

Solid-state electronics, 2017-02, Vol.128, p.60-66

2017

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New insight on the geometry dependence of BTI in 3D technologies based on experiments and modeling

2017 Symposium on VLSI Technology, 2017, p.T134-T135

2017

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Papers Selected from the EUROSOI 2010 Conference

Solid-state electronics, 2011, Vol.59 (1)

2011

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High-Performance Ultrathin Body c-SiGe Channel FDSOI pMOSFETs Featuring SiGe Source and Drain: V Tuning, Variability, Access Resistance, and Mobility Issues

IEEE transactions on electron devices, 2013-05, Vol.60 (5), p.1568-1574

2013

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Multi- V UTBB FDSOI Device Architectures for Low-Power CMOS Circuit

IEEE transactions on electron devices, 2011-08, Vol.58 (8), p.2473-2482

2011

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On the Variability in Planar FDSOI Technology: From MOSFETs to SRAM Cells : CHARACTERIZATION OF NANO CMOS VARIABIALITY BY SIMULATION AND MEASUREMENTS

IEEE transactions on electron devices, 2011, Vol.58 (8), p.2326-2336

2011

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Multi-[Formula Omitted] UTBB FDSOI Device Architectures for Low-Power CMOS Circuit

IEEE transactions on electron devices, 2011-08, Vol.58 (8), p.2473

2011

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Foreword

Solid-state electronics, 2007-02, Vol.51 (2), p.187

2007

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Multichannel Field-Effect Transistor (MCFET)—Part II: Analysis of Gate Stack and Series Resistance Influence on the MCFET Performance

IEEE transactions on electron devices, 2009

2009

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A wigner function-based determinist method for the simulation of quantum transport in silicon nanowire transistors

2011 International Conference on Simulation of Semiconductor Processes and Devices, 2011, p.75-78

2011

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First Internal Spacers' Introduction in Record High ION/IOFF TiN/HfO2 Gate Multichannel MOSFET Satisfying Both High-Performance and Low Standby Power Requirements

IEEE electron device letters, 2009, Vol.30 (2), p.148-151

2009

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Extraction of Drain Current Variability Components in Junctionless Nanowire Transistors

2023 International Conference on Noise and Fluctuations (ICNF), 2023, p.1-4

2023

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Experimental comparison of programming mechanisms in 1T-DRAM cells with variable channel length

2010 Proceedings of the European Solid State Device Research Conference, 2010, p.150-153

2010

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Stress-induced performance enhancement in Si ultra-thin body FD-SOI MOSFETs: Impacts of scaling

2011 Symposium on VLSI Technology - Digest of Technical Papers, 2011, p.162-163

2011

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Performance of Stacked SOI Nanowires in a Wide Temperature Range

2021 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS), 2021, p.1-4

2021

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EUROSOI'06 Conference. Selected papers

Solid-state electronics, 2007, Vol.51 (2)

2007

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A systematic investigation of work function in advanced metal gate–HfO 2–SiO 2 structures with bevel oxide

Solid-state electronics, 2007, Vol.51 (11), p.1515-1522

2007

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High tolerance to total ionizing dose of –shaped gate field-effect transistors

Applied physics letters, 2006-05, Vol.88, n± XX (22)

Gaillardin P. Paillet V. Ferlet-Cavrois S. Ccristoloveanu O. Faynot C. Jahan, M.

2006

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Study and Optimization of Silicon-CVD Diamond Interface for SOD Applications

MRS proceedings, 2009, Vol.1203 (1), Article 1203-J04-01

2009

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Impact of substrate bias on the mobility of n-type ɷ-gate SOI nanowire MOSFETs

2019 34th Symposium on Microelectronics Technology and Devices (SBMicro), 2019, p.1-4

2019

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Multi-VT UTBB FDSOI Device Architectures for Low-Power CMOS Circuit

Impact of back biasing on carrier transport in ultra-thin-body and BOX (UTBB) Fully Depleted SOI MOSFETs

Comprehensive Evaluation of Junctionless and Inversion-Mode Nanowire MOSFETs Performance at High Temperatures

Foreword

Experimental developments of A2RAM memory cells on SOI and bulk substrates

Study of silicon n- and p-FET SOI nanowires concerning analog performance down to 100K

New insight on the geometry dependence of BTI in 3D technologies based on experiments and modeling

Papers Selected from the EUROSOI 2010 Conference

High-Performance Ultrathin Body c-SiGe Channel FDSOI pMOSFETs Featuring SiGe Source and Drain: V Tuning, Variability, Access Resistance, and Mobility Issues

Multi- V UTBB FDSOI Device Architectures for Low-Power CMOS Circuit

On the Variability in Planar FDSOI Technology: From MOSFETs to SRAM Cells : CHARACTERIZATION OF NANO CMOS VARIABIALITY BY SIMULATION AND MEASUREMENTS

Multi-[Formula Omitted] UTBB FDSOI Device Architectures for Low-Power CMOS Circuit

Foreword

Multichannel Field-Effect Transistor (MCFET)—Part II: Analysis of Gate Stack and Series Resistance Influence on the MCFET Performance

A wigner function-based determinist method for the simulation of quantum transport in silicon nanowire transistors

First Internal Spacers' Introduction in Record High ION/IOFF TiN/HfO2 Gate Multichannel MOSFET Satisfying Both High-Performance and Low Standby Power Requirements

Extraction of Drain Current Variability Components in Junctionless Nanowire Transistors

Experimental comparison of programming mechanisms in 1T-DRAM cells with variable channel length

Stress-induced performance enhancement in Si ultra-thin body FD-SOI MOSFETs: Impacts of scaling

Performance of Stacked SOI Nanowires in a Wide Temperature Range

EUROSOI'06 Conference. Selected papers

A systematic investigation of work function in advanced metal gate–HfO 2–SiO 2 structures with bevel oxide

High tolerance to total ionizing dose of –shaped gate field-effect transistors

Study and Optimization of Silicon-CVD Diamond Interface for SOD Applications

Impact of substrate bias on the mobility of n-type ɷ-gate SOI nanowire MOSFETs

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