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Self-selective van der Waals heterostructures for large scale memory array

Nature communications, 2019-07, Vol.10 (1), p.3161-7, Article 3161

2019

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Energy- and Area-Efficient CMOS Synapse and Neuron for Spiking Neural Networks With STDP Learning

IEEE transactions on circuits and systems. I, Regular papers, 2022-09, Vol.69 (9), p.3632-3642

2022

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IEEE_Xplore

In-sensor reservoir computing for language learning via two-dimensional memristors

Science advances, 2021-05, Vol.7 (20)

2021

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A Fast Response PWM Buck Converter With Active Ramp Tracking Control in a Load Transient Period

IEEE transactions on circuits and systems. II, Express briefs, 2019-03, Vol.66 (3), p.467-471

2019

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IEEE_Xplore

Linearity Enhancement of VCO-Based Continuous-Time Delta-Sigma ADCs Using Digital Feedback Residue Quantization

Electronics (Basel), 2021-11, Vol.10 (22), p.2773

2021

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A 5.8-Gb/s Adaptive Integrating Duobinary DFE Receiver for Multi-Drop Memory Interface

IEEE journal of solid-state circuits, 2017-06, Vol.52 (6), p.1563-1575

2017

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IEEE_Xplore

High-Speed Column Driver IC Having Buffer Amplifier with Embedded Isolation Switch and Compact Adaptive Biasing for Flat-Panel Displays

Electronics (Basel), 2021-09, Vol.10 (18), p.2309

2021

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Fast Output Voltage-Regulated PWM Buck Converter With an Adaptive Ramp Amplitude Control

IEEE transactions on circuits and systems. II, Express briefs, 2013-10, Vol.60 (10), p.712-716

2013

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IEEE_Xplore

A Minimum Energy Tracking Loop with Accurate Energy Sensing and Hierarchical Tracking

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2020, 20(4), 94, pp.311-319

2020

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Adding Distance Information to Self-Supervised Learning for rich Representations

2023 IEEE International Conference on Image Processing (ICIP), 2023, p.1270-1274

2023

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A Polymorphic Memtransistor with Tunable Metallic and Semiconducting Channel

Advanced materials (Weinheim), 2023-04, Vol.35 (15), p.e2209089-n/a

2023

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Widely Tunable Adaptive Resolution-controlled Read-sensing Reference Current Generation for Reliable PRAM Data Read at Scaled Technologies

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2017, 17(3), 75, pp.363-369

2017

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Simultaneous Reverse Body and Negative Word-Line Biasing Control Scheme for Leakage Reduction of DRAM

IEEE journal of solid-state circuits, 2011-10, Vol.46 (10), p.2396-2405

2011

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IEEE_Xplore

Ultra-fast Adaptive Frequency-controlled Hysteretic Buck Converter for Portable Devices

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2016, 16(5), 71, pp.615-623

2016

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CMOS Charge Pump With Transfer Blocking Technique for No Reversion Loss and Relaxed Clock Timing Restriction

IEEE transactions on circuits and systems. II, Express briefs, 2009-01, Vol.56 (1), p.11-15

2009

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IEEE_Xplore

10T SRAM Using Half- V} Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage

IEEE transactions on very large scale integration (VLSI) systems, 2017-04, Vol.25 (4), p.1193-1203

2017

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IEEE_Xplore

Low-Voltage CMOS Differential Logic Style With Supply Voltage Approaching Device Threshold

IEEE transactions on circuits and systems. II, Express briefs, 2012-03, Vol.59 (3), p.173-177

2012

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IEEE_Xplore

Current-Integrating DFE with Sub-UI ISI Cancellation for Multi-Drop Channels

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2016, 16(1), 67, pp.112-117

2016

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Charge sharing write driver and half‐VDD pre‐charge 8T SRAM with virtual ground for low‐power write and read operation

IET circuits, devices & systems, 2018-01, Vol.12 (1), p.94-98

2018

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Adaptive Digital Background Gain Mismatch Calibration for Multi-lane High-speed Serial Links

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2015, 15(1), 61, pp.96-100

2015

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Multi-Channel Audio CODEC with Channel Interference Suppression

JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, 2015, 15(6), 66, pp.608-614

2015

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A 6 Gbps/pin Low‐Power Half‐Duplex Active Cross‐Coupled LVDS Transceiver with Switched Termination

ETRI Journal, 2008, 30(4), , pp.612-614

2008

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A DFE Receiver With Equalized VREF for Multidrop Single-Ended Signaling

IEEE transactions on circuits and systems. II, Express briefs, 2013-07, Vol.60 (7), p.412-416

2013

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IEEE_Xplore

CMOS Charge Pump With No Reversion Loss and Enhanced Drivability

IEEE transactions on very large scale integration (VLSI) systems, 2014-06, Vol.22 (6), p.1441-1445

2014

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IEEE_Xplore

CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control

2008 IEEE International Symposium on Circuits and Systems, 2008, p.3094-3097

2008

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IEEE_Xplore

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Self-selective van der Waals heterostructures for large scale memory array

Energy- and Area-Efficient CMOS Synapse and Neuron for Spiking Neural Networks With STDP Learning

In-sensor reservoir computing for language learning via two-dimensional memristors

A Fast Response PWM Buck Converter With Active Ramp Tracking Control in a Load Transient Period

Linearity Enhancement of VCO-Based Continuous-Time Delta-Sigma ADCs Using Digital Feedback Residue Quantization

A 5.8-Gb/s Adaptive Integrating Duobinary DFE Receiver for Multi-Drop Memory Interface

High-Speed Column Driver IC Having Buffer Amplifier with Embedded Isolation Switch and Compact Adaptive Biasing for Flat-Panel Displays

Fast Output Voltage-Regulated PWM Buck Converter With an Adaptive Ramp Amplitude Control

A Minimum Energy Tracking Loop with Accurate Energy Sensing and Hierarchical Tracking

Adding Distance Information to Self-Supervised Learning for rich Representations

A Polymorphic Memtransistor with Tunable Metallic and Semiconducting Channel

Widely Tunable Adaptive Resolution-controlled Read-sensing Reference Current Generation for Reliable PRAM Data Read at Scaled Technologies

Simultaneous Reverse Body and Negative Word-Line Biasing Control Scheme for Leakage Reduction of DRAM

Ultra-fast Adaptive Frequency-controlled Hysteretic Buck Converter for Portable Devices

CMOS Charge Pump With Transfer Blocking Technique for No Reversion Loss and Relaxed Clock Timing Restriction

10T SRAM Using Half- V} Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage

Low-Voltage CMOS Differential Logic Style With Supply Voltage Approaching Device Threshold

Current-Integrating DFE with Sub-UI ISI Cancellation for Multi-Drop Channels

Charge sharing write driver and half‐VDD pre‐charge 8T SRAM with virtual ground for low‐power write and read operation

Adaptive Digital Background Gain Mismatch Calibration for Multi-lane High-speed Serial Links

Multi-Channel Audio CODEC with Channel Interference Suppression

A 6 Gbps/pin Low‐Power Half‐Duplex Active Cross‐Coupled LVDS Transceiver with Switched Termination

A DFE Receiver With Equalized VREF for Multidrop Single-Ended Signaling

CMOS Charge Pump With No Reversion Loss and Enhanced Drivability

CMOS temperature sensor with ring oscillator for mobile DRAM self-refresh control

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