UB Paderborn / Katalog / Suche / in CDI

HW/SW coverification performance estimation and benchmark for a 24 embedded RISC core design

Annual ACM IEEE Design Automation Conference: Proceedings of the 35th annual conference on Design automation; 15-19 June 1998, 1998, p.808-811

1998

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Exhaustive experimental study of tunnel field effect transistors (TFETs): From materials to architecture

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.53-56

2009

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Concurrent Design Methodology and Configuration Management of the SIEMENS EWSD - CCS7E Processor System Simulation

32nd Design Automation Conference, 1995, p.222-227

Thomas W. Albrecht

1995

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Concurrent design methodology and configuration management of the SIEMENS EWSD-CCS7E processor system simulation

Annual ACM IEEE Design Automation Conference: Proceedings of the 32nd ACM/IEEE conference on Design automation; 12-16 June 1995, 1995, p.222-227

Albrecht, Thomas W.

1995

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Silicon nanowire pinch-off FET : Basic operation and analytical model

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.245-248

2009

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Investigation of the vertical IMOS-transistor by device simulation

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.281-284

2009

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Experiences with an optical long-haul 2.24 Gbit/s transmission system at a wavelength of 1.3 μm

Electronics letters, 1982-01, Vol.18 (17), p.746

1982

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A multilayer RRAM nanoarchitecture with resistively switching Ag-doped spin-on glass

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.143-146

2009

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Underlap channel UTBB MOSFETs for low-power analog/RF applications

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.173-176

2009

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Suppression of DIBL in deca-nano SOI MOSFETs by controlling permittivity and thickness of BOX layers

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.329-332

2009

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The mobile robot surrogate method for developing autonomy

IEEE transactions on robotics and automation, 1998-04, Vol.14 (2), p.314-320

1998

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Interface engineering for the suppression of ambipolar behavior in Schottky-barrier MOSFETs

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.69-72

2009

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Stable, low power and high performance SRAM based on CNFET

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.317-320

2009

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Phenomenological considerations of resistively switching TiO2 in nano crossbar arrays

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.135-138

2009

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Using low-k oxide for reduction of leakage current in Double Gate Tunnel FET

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.301-304

2009

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Implementing brain-like systems using nano functional devices

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.131-134

Shibata, T.

2009

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Basic insight about the strain engineering of n-type FinFETs

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.113-116

2009

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Using charge self-compensation domino full-adder with multiple supply and dual threshold voltage in 45nm technology

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.225-228

2009

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Rare-earth based alternative gate dielectrics for future integration in MOSFETs

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.99-102

2009

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Performance enhancement of uniaxially-tensile strained Si NW-nFETs fabricated by lateral strain relaxation of SSOI

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.109-112

2009

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Simulation study of graphene nanoribbon tunneling transistors including edge roughness effects

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.57-60

2009

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Quantum compact model for ultra-narrow body FinFET

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.293-296

2009

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A Parzen-window classifier architecture for massively-integrated nanoscale resonant devices

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.217-220

2009

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Impact of sputter deposited TaN and TiN metal gates on ZrO2/Ge and ZrO2/Si high-k dielectric gate stacks

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.197-200

2009

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High performance Schottky barrier MOSFETs on UTB SOI

2009 10th International Conference on Ultimate Integration of Silicon, 2009, p.65-68

2009

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HW/SW coverification performance estimation and benchmark for a 24 embedded RISC core design

Exhaustive experimental study of tunnel field effect transistors (TFETs): From materials to architecture

Concurrent Design Methodology and Configuration Management of the SIEMENS EWSD - CCS7E Processor System Simulation

Concurrent design methodology and configuration management of the SIEMENS EWSD-CCS7E processor system simulation

Silicon nanowire pinch-off FET : Basic operation and analytical model

Investigation of the vertical IMOS-transistor by device simulation

Experiences with an optical long-haul 2.24 Gbit/s transmission system at a wavelength of 1.3 μm

A multilayer RRAM nanoarchitecture with resistively switching Ag-doped spin-on glass

Underlap channel UTBB MOSFETs for low-power analog/RF applications

Suppression of DIBL in deca-nano SOI MOSFETs by controlling permittivity and thickness of BOX layers

The mobile robot surrogate method for developing autonomy

Interface engineering for the suppression of ambipolar behavior in Schottky-barrier MOSFETs

Stable, low power and high performance SRAM based on CNFET

Phenomenological considerations of resistively switching TiO2 in nano crossbar arrays

Using low-k oxide for reduction of leakage current in Double Gate Tunnel FET

Implementing brain-like systems using nano functional devices

Basic insight about the strain engineering of n-type FinFETs

Using charge self-compensation domino full-adder with multiple supply and dual threshold voltage in 45nm technology

Rare-earth based alternative gate dielectrics for future integration in MOSFETs

Performance enhancement of uniaxially-tensile strained Si NW-nFETs fabricated by lateral strain relaxation of SSOI

Simulation study of graphene nanoribbon tunneling transistors including edge roughness effects

Quantum compact model for ultra-narrow body FinFET

A Parzen-window classifier architecture for massively-integrated nanoscale resonant devices

Impact of sputter deposited TaN and TiN metal gates on ZrO2/Ge and ZrO2/Si high-k dielectric gate stacks

High performance Schottky barrier MOSFETs on UTB SOI

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