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A 0.13mJ/Prediction CIFAR-100 Raster-Scan- Based Wired-Logic Processor Using Non-Linear Neural Network

2023 IEEE International Symposium on Circuits and Systems (ISCAS), 2023, p.1-5

2023

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A 0.13μm CMOS 5GHz Fully Integrated 2x3 MIMO Transceiver IC with over 40dB Isolation

2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2007, p.661-664

2007

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A 0.5-V 1.56-mW 5.5-GHz RF transceiver IC module with J-shaped folded monopole antenna

2015 IEEE International Symposium on Circuits and Systems (ISCAS), 2015, p.1218-1221

2015

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A 0.5-V 2.5-GHz high-gain low-power regenerative amplifier based on Colpitts oscillator topology in 65-nm CMOS

2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2014, p.340-343

2014

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A 0.5-V 5.8-GHz low-power asymmetrical QPSK/OOK transceiver for wireless sensor network

The 20th Asia and South Pacific Design Automation Conference, 2015, p.40-41

2015

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A 0.61-μJ/Frame Pipelined Wired-logic DNN Processor in 16-nm FPGA Using Convolutional Non-Linear Neural Network

IEEE open journal of circuits and systems, 2022, Vol.3, p.4-14

2022

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A 1.2-V CMOS complex bandpass filter with a tunable center frequency

Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005, 2005, p.327-330

2005

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A 1.2nJ/Classification Fully Synthesized All-Digital Asynchronous Wired-Logic Processor Using Quantized Non-Linear Function Blocks in 0.18μm CMOS

Proceedings of the 28th Asia and South Pacific Design Automation Conference, 2023, p.180-181

2023

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100th Anniversary at Faculty of Textile Science & Technology, Shinshu University

Sen'i Gakkaishi, 2010/09/10, Vol.66(9), pp.P_299-P_299

HAMADA, KUNIHIRO

2010

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10th Pacific Basin Nuclear Conference (10-PBNC): Nuclear Future: Pacific Basin Challenges for Sustainable Development International Conference Center Kobe, Kobe, Japan 20-25 October, 1996

Journal of nuclear science and technology, 1997-01, Vol.34 (1), p.83-91

1997

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A 12.8-Gb/s 0.5-pJ/b Encoding-less Inductive Coupling Interface Achieving 111-GB/s/W 3D-Stacked SRAM in 7-nm FinFET

IEEE solid-state circuits letters, 2023-01, Vol.6, p.1-1

2023

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A 144-channel HAPD for the Aerogel RICH at Belle II

Nuclear instruments & methods in physics research. Section A, Accelerators, spectrometers, detectors and associated equipment, 2014-12, Vol.766, p.145-147

2014

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A 16 Gb 3-Bit Per Cell (X3) NAND Flash Memory on 56 nm Technology With 8 MB/s Write Rate

IEEE journal of solid-state circuits, 2009-01, Vol.44 (1), p.195-207

2009

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A 16 nJ/Classification FPGA-Based Wired-Logic DNN Accelerator Using Fixed-Weight Non-Linear Neural Net

IEEE journal on emerging and selected topics in circuits and systems, 2021-12, Vol.11 (4), p.751-761

2021

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A 183.4nJ/inference 152.8μW Single-Chip Fully Synthesizable Wired-Logic DNN Processor for Always-On 35 Voice Commands Recognition Application

2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023, p.1-2

2023

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A 19.7 MHz, Fifth-Order Active-RC Chebyshev LPF for Draft IEEE802.11n With Automatic Quality-Factor Tuning Scheme

IEEE journal of solid-state circuits, 2007-11, Vol.42 (11), p.2326-2337

2007

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A 2.3 pJ/bit frequency-stable impulse OOK transmitter powered directly by an RF energy harvesting circuit with −19.5 dBm sensitivity

2014 IEEE Radio Frequency Integrated Circuits Symposium, 2014, p.13-16

2014

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2-D adaptive line enhancer using a new lattice structure

Proceedings of APCCAS'96 - Asia Pacific Conference on Circuits and Systems, 1996, p.211-214

1996

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220 - 265 GHz Active x6 Frequency Multiplier MMIC with InP HEMT Technology

2018 IEEE/MTT-S International Microwave Symposium - IMS, 2018, p.765-768

2018

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220-to-320-GHz Fundamental Mixer in 60-nm InP HEMT Technology Achieving 120/152/168-Gbps Data Transmission in Three Bands

2023 IEEE/MTT-S International Microwave Symposium - IMS 2023, 2023, p.680-683

2023

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220-to-320-GHz Fundamental Mixer in 60-nm InP HEMT Technology Achieving 240-Gbps Dual-Band Data Transmission

IEEE transactions on microwave theory and techniques, 2024-01, Vol.72 (1), p.1-9

2024

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230-305 GHz, > 10-dBm-Output-Power Wideband Power Amplifier Using Low-Q Neutralization Technique in 60-nm InP-HEMT Technology

2020 IEEE BiCMOS and Compound Semiconductor Integrated Circuits and Technology Symposium (BCICTS), 2020, p.1-4

2020

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A 27-MHz/54-MHz 11-mW MPEG-4 video decoder LSI for mobile applications

IEEE journal of solid-state circuits, 2002-11, Vol.37 (11), p.1574-1581

2002

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A 28 GHz four-channel phased-array transceiver in 65-nm CMOS technology for 5G applications

International journal of electronics and communications, 2019-01, Vol.98, p.19-28

2019

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2D Cantilever Array SPM using Optical Interference

TRANSDUCERS 2007 - 2007 International Solid-State Sensors, Actuators and Microsystems Conference, 2007, p.2413-2416

2007

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A 0.13mJ/Prediction CIFAR-100 Raster-Scan- Based Wired-Logic Processor Using Non-Linear Neural Network

A 0.13μm CMOS 5GHz Fully Integrated 2x3 MIMO Transceiver IC with over 40dB Isolation

A 0.5-V 1.56-mW 5.5-GHz RF transceiver IC module with J-shaped folded monopole antenna

A 0.5-V 2.5-GHz high-gain low-power regenerative amplifier based on Colpitts oscillator topology in 65-nm CMOS

A 0.5-V 5.8-GHz low-power asymmetrical QPSK/OOK transceiver for wireless sensor network

A 0.61-μJ/Frame Pipelined Wired-logic DNN Processor in 16-nm FPGA Using Convolutional Non-Linear Neural Network

A 1.2-V CMOS complex bandpass filter with a tunable center frequency

A 1.2nJ/Classification Fully Synthesized All-Digital Asynchronous Wired-Logic Processor Using Quantized Non-Linear Function Blocks in 0.18μm CMOS

100th Anniversary at Faculty of Textile Science & Technology, Shinshu University

10th Pacific Basin Nuclear Conference (10-PBNC): Nuclear Future: Pacific Basin Challenges for Sustainable Development International Conference Center Kobe, Kobe, Japan 20-25 October, 1996

A 12.8-Gb/s 0.5-pJ/b Encoding-less Inductive Coupling Interface Achieving 111-GB/s/W 3D-Stacked SRAM in 7-nm FinFET

A 144-channel HAPD for the Aerogel RICH at Belle II

A 16 Gb 3-Bit Per Cell (X3) NAND Flash Memory on 56 nm Technology With 8 MB/s Write Rate

A 16 nJ/Classification FPGA-Based Wired-Logic DNN Accelerator Using Fixed-Weight Non-Linear Neural Net

A 183.4nJ/inference 152.8μW Single-Chip Fully Synthesizable Wired-Logic DNN Processor for Always-On 35 Voice Commands Recognition Application

A 19.7 MHz, Fifth-Order Active-RC Chebyshev LPF for Draft IEEE802.11n With Automatic Quality-Factor Tuning Scheme

A 2.3 pJ/bit frequency-stable impulse OOK transmitter powered directly by an RF energy harvesting circuit with −19.5 dBm sensitivity

2-D adaptive line enhancer using a new lattice structure

220 - 265 GHz Active x6 Frequency Multiplier MMIC with InP HEMT Technology

220-to-320-GHz Fundamental Mixer in 60-nm InP HEMT Technology Achieving 120/152/168-Gbps Data Transmission in Three Bands

220-to-320-GHz Fundamental Mixer in 60-nm InP HEMT Technology Achieving 240-Gbps Dual-Band Data Transmission

230-305 GHz, > 10-dBm-Output-Power Wideband Power Amplifier Using Low-Q Neutralization Technique in 60-nm InP-HEMT Technology

A 27-MHz/54-MHz 11-mW MPEG-4 video decoder LSI for mobile applications

A 28 GHz four-channel phased-array transceiver in 65-nm CMOS technology for 5G applications

2D Cantilever Array SPM using Optical Interference

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