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An optical neural chip for implementing complex-valued neural network

Nature communications, 2021-01, Vol.12 (1), p.457-457, Article 457

2021

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Vertical Silicon-Nanowire Formation and Gate-All-Around MOSFET

IEEE electron device letters, 2008-07, Vol.29 (7), p.791-794

2008

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Chip-Level Thermoelectric Power Generators Based on High-Density Silicon Nanowire Array Prepared With Top-Down CMOS Technology

IEEE electron device letters, 2011-05, Vol.32 (5), p.674-676

2011

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Fast and low power Michelson interferometer thermo-optical switch on SOI

Optics express, 2008-09, Vol.16 (20), p.15304-15311

2008

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High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices

IEEE electron device letters, 2006-05, Vol.27 (5), p.383-386

2006

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Effect of Interface Traps and Oxide Charge on Drain Current Degradation in Tunneling Field-Effect Transistors

IEEE electron device letters, 2010-08, Vol.31 (8), p.779-781

2010

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Demonstration of Tunneling FETs Based on Highly Scalable Vertical Silicon Nanowires

IEEE electron device letters, 2009-07, Vol.30 (7), p.754-756

2009

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Si-Nanowire Based Gate-All-Around Nonvolatile SONOS Memory Cell

IEEE electron device letters, 2008-05, Vol.29 (5), p.518-521

2008

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Multibit Programmable Flash Memory Realized on Vertical Si Nanowire Channel

IEEE electron device letters, 2010-05, Vol.31 (5), p.390-392

2010

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CMOS Inverter Based on Gate-All-Around Silicon-Nanowire MOSFETs Fabricated Using Top-Down Approach

IEEE electron device letters, 2007-11, Vol.28 (11), p.1021-1024

2007

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Microelectromechanical Maltese-cross metamaterial with tunable terahertz anisotropy

Nature communications, 2012-12, Vol.3 (1), p.1274-1274, Article 1274

2012

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Dependences of photoluminescence from P-implanted epitaxial Ge

Optics express, 2012-04, Vol.20 (8), p.8228

2012

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Ni-Containing Electrodes for Compact Integration of Resistive Random Access Memory With CMOS

IEEE electron device letters, 2013-04, Vol.34 (4), p.508-510

2013

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Plasma-Enhanced Atomic Layer Deposition (PEALD) of TiN using the Organic Precursor Tetrakis(ethylmethylamido)Titanium (TEMAT)

MATEC Web of Conferences, 2016, Vol.39, p.1010

2016

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High-Performance Poly-Si Vertical Nanowire Thin-Film Transistor and the Inverter Demonstration

IEEE electron device letters, 2011-06, Vol.32 (6), p.770-772

2011

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Low-Temperature Transport Characteristics and Quantum-Confinement Effects in Gate-All-Around Si-Nanowire N-MOSFET

IEEE electron device letters, 2007-10, Vol.28 (10), p.909-912

2007

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Realizing and and or Functions With Single Vertical-Slit Field-Effect Transistor

IEEE electron device letters, 2012-02, Vol.33 (2), p.152-154

2012

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Si Nanopillar Array Surface-Textured Thin-Film Solar Cell With Radial p-n Junction

IEEE electron device letters, 2011-02, Vol.32 (2), p.176-178

2011

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Realization of Ni Fully Silicided Gate on Vertical Silicon Nanowire MOSFETs for Adjusting Threshold Voltage ()

IEEE electron device letters, 2011-11, Vol.32 (11), p.1495-1497

2011

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Vertically Stacked SiGe Nanowire Array Channel CMOS Transistors

IEEE electron device letters, 2007-03, Vol.28 (3), p.211-213

2007

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N-channel FinFETs With 25-nm Gate Length and Schottky-Barrier Source and Drain Featuring Ytterbium Silicide

IEEE electron device letters, 2007-02, Vol.28 (2), p.164-167

2007

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An Efficient Triple-Tandem Polymer Solar Cell

IEEE electron device letters, 2009-05, Vol.30 (5), p.490-492

2009

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Experimental Studies of Reliability Issues in Tunneling Field-Effect Transistors

IEEE electron device letters, 2010-05, Vol.31 (5), p.396-398

2010

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Gate Tunneling in Nanowire MOSFETs

IEEE electron device letters, 2011-04, Vol.32 (4), p.461-463

2011

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1.9 μm hybrid silicon/III-V semiconductor laser

Electronics letters, 2013-05, Vol.49 (10), p.664-666

2013

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An optical neural chip for implementing complex-valued neural network

Vertical Silicon-Nanowire Formation and Gate-All-Around MOSFET

Chip-Level Thermoelectric Power Generators Based on High-Density Silicon Nanowire Array Prepared With Top-Down CMOS Technology

Fast and low power Michelson interferometer thermo-optical switch on SOI

High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices

Effect of Interface Traps and Oxide Charge on Drain Current Degradation in Tunneling Field-Effect Transistors

Demonstration of Tunneling FETs Based on Highly Scalable Vertical Silicon Nanowires

Si-Nanowire Based Gate-All-Around Nonvolatile SONOS Memory Cell

Multibit Programmable Flash Memory Realized on Vertical Si Nanowire Channel

CMOS Inverter Based on Gate-All-Around Silicon-Nanowire MOSFETs Fabricated Using Top-Down Approach

Microelectromechanical Maltese-cross metamaterial with tunable terahertz anisotropy

Dependences of photoluminescence from P-implanted epitaxial Ge

Ni-Containing Electrodes for Compact Integration of Resistive Random Access Memory With CMOS

Plasma-Enhanced Atomic Layer Deposition (PEALD) of TiN using the Organic Precursor Tetrakis(ethylmethylamido)Titanium (TEMAT)

High-Performance Poly-Si Vertical Nanowire Thin-Film Transistor and the Inverter Demonstration

Low-Temperature Transport Characteristics and Quantum-Confinement Effects in Gate-All-Around Si-Nanowire N-MOSFET

Realizing and and or Functions With Single Vertical-Slit Field-Effect Transistor

Si Nanopillar Array Surface-Textured Thin-Film Solar Cell With Radial p-n Junction

Realization of Ni Fully Silicided Gate on Vertical Silicon Nanowire MOSFETs for Adjusting Threshold Voltage ()

Vertically Stacked SiGe Nanowire Array Channel CMOS Transistors

N-channel FinFETs With 25-nm Gate Length and Schottky-Barrier Source and Drain Featuring Ytterbium Silicide

An Efficient Triple-Tandem Polymer Solar Cell

Experimental Studies of Reliability Issues in Tunneling Field-Effect Transistors

Gate Tunneling in Nanowire MOSFETs

1.9 μm hybrid silicon/III-V semiconductor laser

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