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Development of PET Imaging Technologies for Organ-Specific Applications

Wei, Shouyi

2020

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Nonlinear baseline estimation of FHR signal using empirical mode decomposition

2012 IEEE 11th International Conference on Signal Processing, 2012, Vol.3, p.1645-1649

2012

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Recent progress in pencil beam scanning FLASH proton therapy: a narrative review

Therapeutic Radiology and Oncology, 2022-12, Vol.6, p.16-16

2022

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Characterizing Primary Breast Cancer and Nodal Involvement with High-Resolution PET/MRI: Novel PET Configurations and Preliminary Results

2020 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC), 2020, p.1-4

2020

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Research on UUV Recovery Active Disturbance Rejection Control Based on LMNN Compensation

International Journal of Control, 2021, Automation, and Systems, 19(7), , pp.2569-2582

2021

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A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network

IEEE transactions on magnetics, 2018-11, Vol.54 (11), p.1-5

2018

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RANA: towards efficient neural acceleration with refresh-optimized embedded DRAM

2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA), 2018, p.340-352

2018

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Atomic Dataflow based Graph-Level Workload Orchestration for Scalable DNN Accelerators

2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2022, p.475-489

2022

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Androgen deprivation‑induced OPHN1 amplification promotes castration‑resistant prostate cancer

Oncology reports, 2022-01, Vol.47 (1), p.1, Article 3

2022

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ABC-DIMM: alleviating the bottleneck of communication in DIMM-based near-memory processing with inter-DIMM broadcast

2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA), 2021, p.237-250

2021

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A 28nm 29.2TFLOPS/W BF16 and 36.5TOPS/W INT8 Reconfigurable Digital CIM Processor with Unified FP/INT Pipeline and Bitwise In-Memory Booth Multiplication for Cloud Deep Learning Acceleration

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.1-3

2022

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Disturbance aware memory partitioning for parallel data access in STT-RAM

2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC), 2017, p.1-6

2017

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CPE: An Energy-Efficient Edge-Device Training with Multi-dimensional Compression Mechanism

2023 60th ACM/IEEE Design Automation Conference (DAC), 2023, p.1-6

2023

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MECLA: Memory-Compute-Efficient LLM Accelerator with Scaling Sub-matrix Partition

2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA), 2024, p.1032-1047

2024

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A 28nm 4170-TFLOPS/W/b and 195-TFLOPS/mm2/b Multiply-Free Fully-Digital Floating-Point Compute-In-Memory Macro with Mitchell's Approximation

2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2024, p.1-2

2024

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A 52.01 TFLOPS/W Diffusion Model Processor with Inter-Time-Step Convolution-Attention-Redundancy Elimination and Bipolar Floating-Point Multiplication

2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2024, p.1-2

2024

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TAEM: Fast Transfer-Aware Effective Loop Mapping for Heterogeneous Resources on CGRA

2020 57th ACM/IEEE Design Automation Conference (DAC), 2020, p.1-6

2020

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A fast and power efficient architecture to parallelize LSTM based RNN for cognitive intelligence applications

2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC), 2017, p.1-6

2017

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GraphABCD: scaling out graph analytics with asynchronous block coordinate descent

2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA), 2020, p.419-432

2020

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Aggressive pipelining of irregular applications on reconfigurable hardware

2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA), 2017, p.575-586

2017

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16.4 TensorCIM: A 28nm 3.7nJ/Gather and 8.3TFLOPS/W FP32 Digital-CIM Tensor Processor for MCM-CIM-Based Beyond-NN Acceleration

2023 IEEE International Solid- State Circuits Conference (ISSCC), 2023, p.254-256

2023

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STC: Significance-aware Transform-based Codec Framework for External Memory Access Reduction

2020 57th ACM/IEEE Design Automation Conference (DAC), 2020, p.1-6

2020

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CaSMap: agile mapper for reconfigurable spatial architectures by automatically clustering intermediate representations and scattering mapping process

Proceedings of the 49th Annual International Symposium on Computer Architecture, 2022, p.259-273

2022

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Efficient access scheme for multi-bank based NTT architecture through conflict graph

Proceedings of the 59th ACM/IEEE Design Automation Conference, 2022, p.91-96

2022

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FACT: FFN-Attention Co-optimized Transformer Architecture with Eager Correlation Prediction

Proceedings of the 50th Annual International Symposium on Computer Architecture, 2023, p.1-14

2023

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Development of PET Imaging Technologies for Organ-Specific Applications

Nonlinear baseline estimation of FHR signal using empirical mode decomposition

Recent progress in pencil beam scanning FLASH proton therapy: a narrative review

Characterizing Primary Breast Cancer and Nodal Involvement with High-Resolution PET/MRI: Novel PET Configurations and Preliminary Results

Research on UUV Recovery Active Disturbance Rejection Control Based on LMNN Compensation

A Multilevel Cell STT-MRAM-Based Computing In-Memory Accelerator for Binary Convolutional Neural Network

RANA: towards efficient neural acceleration with refresh-optimized embedded DRAM

Atomic Dataflow based Graph-Level Workload Orchestration for Scalable DNN Accelerators

Androgen deprivation‑induced OPHN1 amplification promotes castration‑resistant prostate cancer

ABC-DIMM: alleviating the bottleneck of communication in DIMM-based near-memory processing with inter-DIMM broadcast

A 28nm 29.2TFLOPS/W BF16 and 36.5TOPS/W INT8 Reconfigurable Digital CIM Processor with Unified FP/INT Pipeline and Bitwise In-Memory Booth Multiplication for Cloud Deep Learning Acceleration

Disturbance aware memory partitioning for parallel data access in STT-RAM

CPE: An Energy-Efficient Edge-Device Training with Multi-dimensional Compression Mechanism

MECLA: Memory-Compute-Efficient LLM Accelerator with Scaling Sub-matrix Partition

A 28nm 4170-TFLOPS/W/b and 195-TFLOPS/mm2/b Multiply-Free Fully-Digital Floating-Point Compute-In-Memory Macro with Mitchell's Approximation

A 52.01 TFLOPS/W Diffusion Model Processor with Inter-Time-Step Convolution-Attention-Redundancy Elimination and Bipolar Floating-Point Multiplication

TAEM: Fast Transfer-Aware Effective Loop Mapping for Heterogeneous Resources on CGRA

A fast and power efficient architecture to parallelize LSTM based RNN for cognitive intelligence applications

GraphABCD: scaling out graph analytics with asynchronous block coordinate descent

Aggressive pipelining of irregular applications on reconfigurable hardware

16.4 TensorCIM: A 28nm 3.7nJ/Gather and 8.3TFLOPS/W FP32 Digital-CIM Tensor Processor for MCM-CIM-Based Beyond-NN Acceleration

STC: Significance-aware Transform-based Codec Framework for External Memory Access Reduction

CaSMap: agile mapper for reconfigurable spatial architectures by automatically clustering intermediate representations and scattering mapping process

Efficient access scheme for multi-bank based NTT architecture through conflict graph

FACT: FFN-Attention Co-optimized Transformer Architecture with Eager Correlation Prediction

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