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A 0.1-to-1.5GHz 4.2mW All-Digital DLL with Dual Duty-Cycle Correction Circuit and Update Gear Circuit for DRAM in 66nm CMOS Technology

2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, 2008, p.282-613

2008

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A 0.25 mu m 3.0 V 1T1C 32 Mb nonvolatile ferroelectric RAM with address transition detector (ATD) and current forcing latch sense amplifier (CFLSA) scheme

Digest of technical papers - IEEE International Solid-State Circuits Conference, 2002-01, p.124-125+430-431

2002

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A 0.25 /spl mu/m 3.0 V 1T1C 32 Mb nonvolatile ferroelectric RAM with address transition detector (ATD) and current forcing latch sense amplifier (CFLSA) scheme

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315), 2002, Vol.1, p.162-457 vol.1

2002

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IEEE_Xplore

A 0.25/spl mu/m 3.0V 1T1C 32Mb nonvolatile ferroelectric RAM with address transition detector (ATD) and current forcing latch sense amplifier (CFLSA) scheme

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315), 2002, Vol.2, p.124-431

2002

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A 0.35 μm SiGe BiCMOS 8 GHz Low Noise Broad Band Amplifier

Proceedings of the IEEE SoutheastCon 2006, 2006, p.224-227

2006

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A 1.23W/mm2 83.7%-Efficiency 400MHz 6-Phase Fully Integrated Buck Converter in 28nm CMOS with On-Chip Capacitor Dynamic Re-Allocation for Inter-Inductor Current Balancing and Fast DVS of 75mV/ns

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.1-3

2022

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IEEE_Xplore

A 1.2V 12.8GB/s 2Gb mobile Wide-I/O DRAM with 4×128 I/Os using TSV-based stacking

2011 IEEE International Solid-State Circuits Conference, 2011, p.496-498

2011

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IEEE_Xplore

A 1.4 Gb/s DLL using 2nd order charge-pump scheme with low phase/duty error for high-speed DRAM application

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519), 2004, p.212-523 Vol.1

First edition, 2004

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IEEE_Xplore

A 1.6V 3.3Gb/s GDDR3 DRAM with dual-mode phase- and delay-locked loop using power-noise management with unregulated power supply in 54nm CMOS

2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, 2009, p.140-141,141a

2009

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IEEE_Xplore

10-Year Clinical Follow-Up after Decompression of Lipofibromatous Hamartoma of the Median Nerve in a 3-Year-Old Patient: Case Report and Review of the Literature

Children (Basel, Switzerland), 2023, Vol.10 (9)

2023

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A 100mW Dual-Band CMOS Mobile-TV Tuner IC for T-DMB/DAB and ISDB-T

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers, 2006, p.2534-2543

2006

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IEEE_Xplore

A 10b Driver IC for a Spatial Optical Modulator for Full HDTV Applications

2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, 2007, p.138-592

2007

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13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5th-Generation 10nm DRAM Process

2024 IEEE International Solid-State Circuits Conference (ISSCC), 2024, Vol.67, p.234-236

2024

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IEEE_Xplore

A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking

2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, p.204-206

2018

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IEEE_Xplore

A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exploiting Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense Amplifiers in a Fourth Generation 10nm DRAM Process

2022 IEEE International Solid- State Circuits Conference (ISSCC), 2022, Vol.65, p.448-450

2022

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IEEE_Xplore

A 16Gb/s/pin 8Gb GDDR6 DRAM with bandwidth extension techniques for high-speed applications

2018 IEEE International Solid - State Circuits Conference - (ISSCC), 2018, p.210-212

2018

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IEEE_Xplore

17beta-estradiol induces up-regulation of PTEN and PPARgamma in leiomyoma cells, but not in normal cells

International journal of oncology, 2010-04, Vol.36 (4), p.921

2010

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17ss-estradiol induces up-regulation of PTEN and PPARγ in leiomyoma cells, but not in normal cells

International journal of oncology, 2010, Vol.36 (4), p.921-927

2010

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17β-estradiol induces an interaction between adenosine monophosphate-activated protein kinase and the insulin signaling pathway in 3T3-L1 adipocytes

International journal of molecular medicine, 2012-10, Vol.30 (4), p.979

2012

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18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution

2016 IEEE International Solid-State Circuits Conference (ISSCC), 2016, p.316-317

2016

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IEEE_Xplore

2,3-Diarylbenzopyran Derivatives as a Novel Class of Selective Cyclooxygenase-2 Inhibitors

ChemInform, 2003-06, Vol.34 (22), p.no-no

2003

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2014 Korean Liver Cancer Study Group-National Cancer Center Korea practice guideline for the management of hepatocellular carcinoma

Korean Journal of Radiology, 2015, 16(3), , pp.465-522

2015

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A 2048 complex point FFT processor for DAB systems

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361), 1999, p.309-312

1999

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IEEE_Xplore

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A 0.1-to-1.5GHz 4.2mW All-Digital DLL with Dual Duty-Cycle Correction Circuit and Update Gear Circuit for DRAM in 66nm CMOS Technology

A 0.25 mu m 3.0 V 1T1C 32 Mb nonvolatile ferroelectric RAM with address transition detector (ATD) and current forcing latch sense amplifier (CFLSA) scheme

A 0.25 /spl mu/m 3.0 V 1T1C 32 Mb nonvolatile ferroelectric RAM with address transition detector (ATD) and current forcing latch sense amplifier (CFLSA) scheme

A 0.25/spl mu/m 3.0V 1T1C 32Mb nonvolatile ferroelectric RAM with address transition detector (ATD) and current forcing latch sense amplifier (CFLSA) scheme

A 0.35 μm SiGe BiCMOS 8 GHz Low Noise Broad Band Amplifier

A 1.23W/mm2 83.7%-Efficiency 400MHz 6-Phase Fully Integrated Buck Converter in 28nm CMOS with On-Chip Capacitor Dynamic Re-Allocation for Inter-Inductor Current Balancing and Fast DVS of 75mV/ns

A 1.2V 12.8GB/s 2Gb mobile Wide-I/O DRAM with 4×128 I/Os using TSV-based stacking

A 1.4 Gb/s DLL using 2nd order charge-pump scheme with low phase/duty error for high-speed DRAM application

A 1.6V 3.3Gb/s GDDR3 DRAM with dual-mode phase- and delay-locked loop using power-noise management with unregulated power supply in 54nm CMOS

10-Year Clinical Follow-Up after Decompression of Lipofibromatous Hamartoma of the Median Nerve in a 3-Year-Old Patient: Case Report and Review of the Literature

A 100mW Dual-Band CMOS Mobile-TV Tuner IC for T-DMB/DAB and ISDB-T

A 10b Driver IC for a Spatial Optical Modulator for Full HDTV Applications

13.2 A 32Gb 8.0Gb/s/pin DDR5 SDRAM with a Symmetric-Mosaic Architecture in a 5th-Generation 10nm DRAM Process

A 16Gb 18Gb/S/pin GDDR6 DRAM with per-bit trainable single-ended DFE and PLL-less clocking

A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exploiting Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense Amplifiers in a Fourth Generation 10nm DRAM Process

A 16Gb/s/pin 8Gb GDDR6 DRAM with bandwidth extension techniques for high-speed applications

17beta-estradiol induces up-regulation of PTEN and PPARgamma in leiomyoma cells, but not in normal cells

17ss-estradiol induces up-regulation of PTEN and PPARγ in leiomyoma cells, but not in normal cells

17β-estradiol induces an interaction between adenosine monophosphate-activated protein kinase and the insulin signaling pathway in 3T3-L1 adipocytes

18.2 A 1.2V 20nm 307GB/s HBM DRAM with at-speed wafer-level I/O test scheme and adaptive refresh considering temperature distribution

2,3-Diarylbenzopyran Derivatives as a Novel Class of Selective Cyclooxygenase-2 Inhibitors

2014 Korean Liver Cancer Study Group-National Cancer Center Korea practice guideline for the management of hepatocellular carcinoma

2021 Korean Thyroid Imaging Reporting and Data System and Imaging-Based Management of Thyroid Nodules: Korean Society of Thyroid Radiology Consensus Statement and Recommendations

2021 Korean Thyroid Imaging Reporting and Data System and Imaging-Based Management of Thyroid Nodules: Korean Society of Thyroid Radiology Consensus Statement and Recommendations

A 2048 complex point FFT processor for DAB systems

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