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Charon: Specialized Near-Memory Processing Architecture for Clearing Dead Objects in Memory
Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019, p.726-739
2019
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ELSA: hardware-software co-design for efficient, lightweight self-attention mechanism in neural networks
2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA), 2021, p.692-705
2021
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Mithril: Cooperative Row Hammer Protection on Commodity DRAM Leveraging Managed Refresh
2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2022, p.1156-1169
2022
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A specialized architecture for object serialization with applications to big data analytics
2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture (ISCA), 2020, p.322-334
2020
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BOSS: bandwidth-optimized search accelerator for storage-class memory
2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA), 2021, p.279-291
2021
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SOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures
2017 IEEE International Symposium on High Performance Computer Architecture (HPCA), 2017, p.517-528
2017
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MaPHeA: a lightweight memory hierarchy-aware profile-guided heap allocation framework
Proceedings of the 22nd ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems, 2021, p.24-36
2021
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A 40nm 5.6TOPS/W 239GOPS/mm2 Self-Attention Processor with Sign Random Projection-based Approximation
ESSCIRC 2022- IEEE 48th European Solid State Circuits Conference (ESSCIRC), 2022, p.85-88
2022
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A dual-mode direct-conversion CMOS transceiver for Bluetooth and 802.11b
ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705), 2003, p.225-228
2003
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Interlayer dielectric (ILD)-related edge channel effect in high density DRAM cell
Digest. International Electron Devices Meeting, 2002, p.827-830
2002
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3D graphics accelerator platform for mobile devices
Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921), 2004, p.387-390
2004
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An efficient equalizer architecture using tap allocation memory for HDTV channel
The 3rd IEEE International Workshop on System-on-Chip for Real-Time Applications, 2003. Proceedings, 2003, p.343-349
2003
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Impact of mechanical stress engineering on flicker noise characteristics
Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004, 2004, p.102-103
2004
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A low jitter dual loop DLL using multiple VCDLs with a duty cycle corrector
2000 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.00CH37103), 2000, p.50-51
2000
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