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0–1 linear integer programming method for granule knowledge reduction and attribute reduction in concept lattices

Soft computing (Berlin, Germany), 2019-01, Vol.23 (2), p.383-391

2019

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A 0.18μm CMOS 300MHz Current-Mode LF Seventh-order Linear Phase Filter for Hard Disk Read Channels

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.3307-3310

2007

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A 0.18-μm CMOS Squarer Circuit for a Non-Coherent UWB Receiver

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.421-424

2007

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A 0.18μm CMOS 2.1GHz Sub-sampling Receiver Front End with Fully Integrated Second- and Fourth-Order Q-Enhanced Filters

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.3103-3106

2007

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A 0.1e- vertical FPN 4.7e- read noise 71dB DR CMOS image sensor with 13b column-parallel single-ended cyclic ADCs

2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers, 2009, p.268-269,269a

2009

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A 0.25-um BiCMOS Feed Foward Equalizer Using Active Delay Line for Backplane Communication

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.193-196

2007

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A 0.5-V Real-Time Computational CMOS Image Sensor With Programmable Kernel for Feature Extraction

IEEE journal of solid-state circuits, 2021-05, Vol.56 (5), p.1588-1596

2021

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A 0.5V Bulk-Input Operational Transconductance Amplifier with Improved Common-Mode Feedback

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.2224-2227

2007

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A 0.75V CMOS image sensor using time-based readout circuit

2009 Symposium on VLSI Circuits, 2009, p.178-179

2009

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0-homogeneous effect algebras

Soft computing (Berlin, Germany), 2010-08, Vol.14 (10), p.1111-1116

Jenča, Gejza

2010

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0-SM: A fast algorithm for mining Candidate Clusters in Pattern-based Clustering

2007 IEEE Symposium on Computational Intelligence and Data Mining, 2007, p.127-132

2007

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A 0D-3D multi-scale model of the portal venous system coupled with the entire cardiovascular system applied to predict postsplenectomy hemodynamic metrics

2023 45th Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC), 2023, Vol.2023, p.1-4

2023

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A (1+1)-CMA-ES for constrained optimisation

Proceedings of the 14th annual conference on Genetic and evolutionary computation, 2012, p.297-304

2012

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The (1+1)-EA on Noisy Linear Functions with Random Positive Weights

2018 IEEE Symposium Series on Computational Intelligence (SSCI), 2018, p.712-719

2018

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(1+1) genetic programming with functionally complete instruction sets can evolve Boolean conjunctions and disjunctions with arbitrarily small error

Artificial intelligence, 2023-06, Vol.319, p.103906, Article 103906

2023

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1/2.5" 8 mega-pixel CMOS Image Sensor with enhanced image quality for DSC application

2006 International Electron Devices Meeting, 2006, p.1-4

2006

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1/2-inch 7.2MPixel CMOS Image Sensor with 2.25/spl mu/m Pixels Using 4-Shared Pixel Structure for Pixel-Level Summation

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers, 2006, p.1994-2003

2006

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1.4 The Future of Computing: Bits + Neurons + Qubits

2020 IEEE International Solid- State Circuits Conference - (ISSCC), 2020, p.30-39

2020

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1:4 Tree microstrip interconnect Kron-Branin model

2018 IEEE International Symposium on Electromagnetic Compatibility and 2018 IEEE Asia-Pacific Symposium on Electromagnetic Compatibility (EMC/APEMC), 2018, p.6-11

2018

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A 1.5-V Low-Power Common-Gate Low Noise Amplifier for Ultrawideband Receivers

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.2618-2621

2007

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A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.1955-1958

2007

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(1,7,4) Data hiding scheme for searching in hidden text with automata

Vietnam journal of computer science, 2015, Vol.2 (4), p.257-265

2015

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A 1.9mW Portable ADPLL-based Frequency Synthesizer for High Speed Clock Generation

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.1137-1140

2007

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O(1) Algorithms for Overlapping Group Sparsity

2014 22nd International Conference on Pattern Recognition, 2014, p.1645-1650

2014

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1-Attempt Subfield-Based Parallel Thinning

2021 12th International Symposium on Image and Signal Processing and Analysis (ISPA), 2021, p.241-246

2021

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0–1 linear integer programming method for granule knowledge reduction and attribute reduction in concept lattices

A 0.18μm CMOS 300MHz Current-Mode LF Seventh-order Linear Phase Filter for Hard Disk Read Channels

A 0.18-μm CMOS Squarer Circuit for a Non-Coherent UWB Receiver

A 0.18μm CMOS 2.1GHz Sub-sampling Receiver Front End with Fully Integrated Second- and Fourth-Order Q-Enhanced Filters

A 0.1e- vertical FPN 4.7e- read noise 71dB DR CMOS image sensor with 13b column-parallel single-ended cyclic ADCs

A 0.25-um BiCMOS Feed Foward Equalizer Using Active Delay Line for Backplane Communication

A 0.5-V Real-Time Computational CMOS Image Sensor With Programmable Kernel for Feature Extraction

A 0.5V Bulk-Input Operational Transconductance Amplifier with Improved Common-Mode Feedback

A 0.75V CMOS image sensor using time-based readout circuit

0-homogeneous effect algebras

0-SM: A fast algorithm for mining Candidate Clusters in Pattern-based Clustering

A 0D-3D multi-scale model of the portal venous system coupled with the entire cardiovascular system applied to predict postsplenectomy hemodynamic metrics

A (1+1)-CMA-ES for constrained optimisation

The (1+1)-EA on Noisy Linear Functions with Random Positive Weights

(1+1) genetic programming with functionally complete instruction sets can evolve Boolean conjunctions and disjunctions with arbitrarily small error

1/2.5" 8 mega-pixel CMOS Image Sensor with enhanced image quality for DSC application

1/2-inch 7.2MPixel CMOS Image Sensor with 2.25/spl mu/m Pixels Using 4-Shared Pixel Structure for Pixel-Level Summation

1.4 The Future of Computing: Bits + Neurons + Qubits

1:4 Tree microstrip interconnect Kron-Branin model

A 1.5-V Low-Power Common-Gate Low Noise Amplifier for Ultrawideband Receivers

A 1.5V 10-b 30-MS/s CMOS Pipelined Analog-to-Digital Converter

(1,7,4) Data hiding scheme for searching in hidden text with automata

A 1.9mW Portable ADPLL-based Frequency Synthesizer for High Speed Clock Generation

O(1) Algorithms for Overlapping Group Sparsity

1-Attempt Subfield-Based Parallel Thinning

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