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Speculative lock elision: enabling highly concurrent multithreaded execution

Proceedings of the annual International Symposium on Microarchitecture, 2001, p.294-305

2001

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Transactional lock-free execution of lock-based programs

Operating systems review, 2002, Vol.36 (5), p.5-17

2002

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Using cache memory to reduce processor-memory traffic

25 years of the international symposia on Computer architecture (selected papers), 1998, p.255-262

1998

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Memory bandwidth limitations of future microprocessors

23rd Annual International Symposium on Computer Architecture (ISCA'96), 1996, p.78-89

1996

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Transactional lock-free execution of lock-based programs

Architectural Support for Programming Languages and Operating Systems: Proceedings of the 10th international conference on Architectural support for programming languages and operating systems; 05-09 Oct. 2002, 2002, p.5-17

2002

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Clinical Implications of Giant Pituitary Adenomas: Surgical Approach to Diagnosis and Endocrine Treatment

Journal of Neurological Surgery Part B: Skull Base, 2018, Vol.79 (S 01), p.S1-S188

2018

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Retrospective: using cache memory to reduce processor-memory traffic

25 years of the international symposia on Computer architecture (selected papers), 1998, p.32-33

1998

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Efficient synchronization: let them eat QOLB

International Symposium on Computer Architecture: Proceedings of the 24th annual international symposium on Computer architecture : Denver, Colorado, United States; 01-04 June 1997, 1997, p.170-180

1997

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DataScalar architectures

Conference Proceedings. The 24th Annual International Symposium on Computer Architecture, 1997, p.338-349

1997

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Inferential queueing and speculative push for reducing critical communication latencies

International Conference on Supercomputing: Proceedings of the 17th annual international conference on Supercomputing; 23-26 June 2003, 2003, p.273-284

2003

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A study of three dynamic approaches to handle widely shared data in shared-memory multiprocessors

International Conference on Supercomputing: Proceedings of the 12th international conference on Supercomputing, 1998, p.457-464

1998

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Author retrospective for code scheduling and register allocation in large basic blocks

ACM International Conference on Supercomputing 25th Anniversary Volume, 2014, p.4-5

2014

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The GLOW cache coherence protocol extensions for widely shared data

International Conference on Supercomputing: Proceedings of the 10th international conference on Supercomputing; 25-28 May 1996, 1996, p.35-43

1996

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Speculative lock elision:enabling highly concurrent multithreaded execution

International Symposium on Microarchitecture: Proceedings of the 34th annual ACM/IEEE international symposium on Microarchitecture : Austin, Texas; 01-05 Dec. 2001, 2001, p.294-305

2001

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Coherency for multiprocessor virtual address caches

Architectural Support for Programming Languages and Operating Systems: Proceedings of the second international conference on Architectual support for programming languages and operating systems : Palo Alto, California, United States, 1987, p.72-81

1987

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Code scheduling and register allocation in large basic blocks

ACM International Conference on Supercomputing 25th Anniversary Volume, 1988, p.88-98

1988

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Performance of the SCI ring

Computer Architecture (19th International Symposium), 1992, p.403-414

1992

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Techniques for reducing overheads of shared-memory multiprocessing

International Conference on Supercomputing: Proceedings of the 9th international conference on Supercomputing; 03-07 July 1995, 1995, p.11-20

1995

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NZTM: nonblocking zero-indirection transactional memory

Proceedings of the twenty-first annual symposium on Parallelism in algorithms and architectures, 2009, p.204-213

2009

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Transactional conflict decoupling and value prediction

Proceedings of the international conference on Supercomputing, 2011, p.33-42

2011

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Restricted Fetch and Φ operations for parallel processing

International Conference on Supercomputing: Proceedings of the 3rd international conference on Supercomputing; 05-09 June 1989, 1989, p.410-416

1989

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The use of static column ram as a memory hierarchy

International Symposium on Computer Architecture: Proceedings of the 11th annual international symposium on Computer architecture, 1984, p.167-173

1984

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Efficient synchronization primitives for large-scale cache-coherent multiprocessors

Architectural Support for Programming Languages and Operating Systems: Proceedings of the third international conference on Architectural support for programming languages and operating systems : Boston, Massachusetts, United States; 03-06 Apr. 1989, 1989, p.64-75

1989

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