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“Secondary doping” methods to significantly enhance the conductivity of PEDOT:PSS for its application as transparent electrode of optoelectronic devices

Displays, 2013-12, Vol.34 (5), p.423-436

Ouyang, Jianyong

2013

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Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing

IEEE transactions on very large scale integration (VLSI) systems, 2010-08, Vol.18 (8), p.1225-1229

2010

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IEEE_Xplore

Boson Sampling on a Photonic Chip

Science (American Association for the Advancement of Science), 2013-02, Vol.339 (6121), p.798-801

2013

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Photonic Boson Sampling in a Tunable Circuit

Science (American Association for the Advancement of Science), 2013-02, Vol.339 (6121), p.794-798

2013

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Design of Testable Reversible Sequential Circuits

IEEE transactions on very large scale integration (VLSI) systems, 2013-07, Vol.21 (7), p.1201-1209

2013

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IEEE_Xplore

Design of Logic Gates and Flip-Flops in High-Performance FinFET Technology

IEEE transactions on very large scale integration (VLSI) systems, 2013-11, Vol.21 (11), p.1975-1988

2013

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IEEE_Xplore

Understanding the Effect of Process Variations on the Delay of Static and Domino Logic

IEEE transactions on very large scale integration (VLSI) systems, 2010-05, Vol.18 (5), p.697-710

2010

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IEEE_Xplore

Low-Power and Area-Efficient Carry Select Adder

IEEE transactions on very large scale integration (VLSI) systems, 2012-02, Vol.20 (2), p.371-375

2012

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IEEE_Xplore

A Study of Tapered 3-D TSVs for Power and Thermal Integrity

IEEE transactions on very large scale integration (VLSI) systems, 2013-02, Vol.21 (2), p.306-319

2013

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IEEE_Xplore

PUF Modeling Attacks on Simulated and Silicon Data

IEEE transactions on information forensics and security, 2013-11, Vol.8 (11), p.1876-1891

2013

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IEEE_Xplore

ORION 2.0: A Power-Area Simulator for Interconnection Networks

IEEE transactions on very large scale integration (VLSI) systems, 2012-01, Vol.20 (1), p.191-196

2012

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IEEE_Xplore

Extracting secret keys from integrated circuits

IEEE transactions on very large scale integration (VLSI) systems, 2005-10, Vol.13 (10), p.1200-1205

2005

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IEEE_Xplore

A universal method for designing low-power carbon nanotube FET-based multiple-valued logic circuits

IET computers & digital techniques, 2013-07, Vol.7 (4), p.167-181

2013

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Towards automatic polyp detection with a polyp appearance model

Pattern recognition, 2012-09, Vol.45 (9), p.3166-3182

2012

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Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs

IEEE transactions on very large scale integration (VLSI) systems, 2013-05, Vol.21 (5), p.793-806

2013

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IEEE_Xplore

Memristor Bridge Synapse-Based Neural Network and Its Learning

IEEE transaction on neural networks and learning systems, 2012-09, Vol.23 (9), p.1426-1435

2012

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IEEE_Xplore

Scalable Packet Classification on FPGA

IEEE transactions on very large scale integration (VLSI) systems, 2012-09, Vol.20 (9), p.1668-1680

2012

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IEEE_Xplore

A Sensitivity Analysis of Power Signal Methods for Detecting Hardware Trojans Under Real Process and Environmental Conditions

IEEE transactions on very large scale integration (VLSI) systems, 2010-12, Vol.18 (12), p.1735-1744

2010

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IEEE_Xplore

Novel Architecture for Efficient FPGA Implementation of Elliptic Curve Cryptographic Processor Over GF(2163)

IEEE transactions on very large scale integration (VLSI) systems, 2013-12, Vol.21 (12), p.2330-2333

2013

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Formal Worst-Case Analysis of Crosstalk Noise in Mesh-Based Optical Networks-on-Chip

IEEE transactions on very large scale integration (VLSI) systems, 2013-10, Vol.21 (10), p.1823-1836

2013

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IEEE_Xplore

Attractivity Analysis of Memristor-Based Cellular Neural Networks With Time-Varying Delays

IEEE transaction on neural networks and learning systems, 2014-04, Vol.25 (4), p.704-717

2014

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IEEE_Xplore

TaintDroid: An Information-Flow Tracking System for Realtime Privacy Monitoring on Smartphones

ACM transactions on computer systems, 2014-06, Vol.32 (2), p.1-29

2014

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Time-Domain CMOS Temperature Sensors With Dual Delay-Locked Loops for Microprocessor Thermal Monitoring

IEEE transactions on very large scale integration (VLSI) systems, 2012-09, Vol.20 (9), p.1590-1601

2012

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IEEE_Xplore

Global Mittag-Leffler stability and synchronization of memristor-based fractional-order neural networks

Neural networks, 2014-03, Vol.51, p.1-8

2014

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Design Exploration of Hybrid CMOS and Memristor Circuit by New Modified Nodal Analysis

IEEE transactions on very large scale integration (VLSI) systems, 2012-06, Vol.20 (6), p.1012-1025

2012

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IEEE_Xplore

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“Secondary doping” methods to significantly enhance the conductivity of PEDOT:PSS for its application as transparent electrode of optoelectronic devices

Design of Low-Power High-Speed Truncation-Error-Tolerant Adder and Its Application in Digital Signal Processing

Boson Sampling on a Photonic Chip

Photonic Boson Sampling in a Tunable Circuit

Design of Testable Reversible Sequential Circuits

Design of Logic Gates and Flip-Flops in High-Performance FinFET Technology

Understanding the Effect of Process Variations on the Delay of Static and Domino Logic

Low-Power and Area-Efficient Carry Select Adder

A Study of Tapered 3-D TSVs for Power and Thermal Integrity

PUF Modeling Attacks on Simulated and Silicon Data

ORION 2.0: A Power-Area Simulator for Interconnection Networks

Extracting secret keys from integrated circuits

A universal method for designing low-power carbon nanotube FET-based multiple-valued logic circuits

Towards automatic polyp detection with a polyp appearance model

Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs

Memristor Bridge Synapse-Based Neural Network and Its Learning

Scalable Packet Classification on FPGA

A Sensitivity Analysis of Power Signal Methods for Detecting Hardware Trojans Under Real Process and Environmental Conditions

Novel Architecture for Efficient FPGA Implementation of Elliptic Curve Cryptographic Processor Over GF(2163)

Formal Worst-Case Analysis of Crosstalk Noise in Mesh-Based Optical Networks-on-Chip

Attractivity Analysis of Memristor-Based Cellular Neural Networks With Time-Varying Delays

TaintDroid: An Information-Flow Tracking System for Realtime Privacy Monitoring on Smartphones

Time-Domain CMOS Temperature Sensors With Dual Delay-Locked Loops for Microprocessor Thermal Monitoring

Global Mittag-Leffler stability and synchronization of memristor-based fractional-order neural networks

Design Exploration of Hybrid CMOS and Memristor Circuit by New Modified Nodal Analysis

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