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A 0.5-V 25-MHz 1-mW 256-kb MTCMOS/SOI SRAM for solar-power-operated portable personal digital equipment - sure write operation by using step-down negatively overdriven bitline scheme

IEEE journal of solid-state circuits, 2006-03, Vol.41 (3), p.728-742

2006

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A 0.7 to 3 GHz wireless receiver front end in 65-nm CMOS with an LNA linearized by positive feedback

Analog integrated circuits and signal processing, 2013, Vol.74 (1), p.49-57

2013

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An 0.8-mm(2) 9.6-mW Iterative Decoder for Faster-Than-Nyquist and Orthogonal Signaling Multicarrier Systems in 65-nm CMOS

IEEE journal of solid-state circuits, 2013, Vol.48 (7), p.1680

2013

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A 1-1 MASH 2-D vernier time-to-digital converter with 2nd-order noise shaping

2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, p.1324-1327

2014

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A 1.2 volt 1.8GHz CMOS quadrature front-end

2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525), 2004, p.362-365

2004

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IEEE_Xplore

A 1.5 V 28 GHz Beam Steering SiGe PLL for an 81-86 GHz E-Band Transmitter

IEEE microwave and wireless components letters, 2016-10, Vol.26 (10), p.843-845

2016

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A 1.8 GHz CMOS VCO with reduced phase noise

2001 Symposium on VLSI Circuits, 2001. Digest of Technical Papers, 2001, p.121-122

2001

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IEEE_Xplore

1/f noise in Si and Si0.7Ge0.3 pMOSFETs

IEEE transactions on electron devices, 2003-12, Vol.50 (12), p.2513

2003

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1/f-noise in vertical InAs nanowire transistors

2013 International Conference on Indium Phosphide and Related Materials (IPRM), 2013, p.1-2

2013

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1/f Noise Sources in Dual-Gated Indium Arsenide Nanowire Transistors

IEEE transactions on electron devices, 2012-07, Vol.59 (7), p.1980-1987

2012

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A 1 GHz CMOS current-folded direct digital RF quadrature modulator

2005 IEEE Radio Frequency integrated Circuits (RFIC) Symposium - Digest of Papers, 2005, p.25-28

2005

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A 10-bit 500-MS/s 124-mW Subranging Folding ADC in 0.13 μm CMOS

2007 IEEE International Symposium on Circuits and Systems (ISCAS), 2007, p.1709-1712

2007

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A 10-bit pipeline ADC using 40-dB opamps and calibrated customized references

2007 7th International Conference on ASIC, 2007, p.249-252

2007

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A 10-Bit Split-Capacitor SAR ADC with DAC Imbalance Estimation and Calibration

2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, p.1-5

2020

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A 10-bit wide-band CMOS direct digital RF amplitude modulator

IEEE journal of solid-state circuits, 2003-07, Vol.38 (7), p.1182-1188

2003

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A 10-mW mm-Wave Phase-Locked Loop With Improved Lock Time in 28-nm FD-SOI CMOS

IEEE transactions on microwave theory and techniques, 2019-04, Vol.67 (4), p.1588-1600

2019

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An 11 GHz-Bandwidth Variable Gain Ka-Band Power Amplifier for 5G Applications

ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference (ESSCIRC), 2019, p.181-184

2019

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An 11mW continuous time delta-Sigma modulator with 20 MHz bandwidth in 65nm CMOS

2014 IEEE International Symposium on Circuits and Systems (ISCAS), 2014, p.2337-2340

2014

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A 12-bit High-Speed Time-Interleaved Pipelined Asynchronous Successive-Approximation ADC in 22-nm FDSOI CMOS

IEEE access, 2024, Vol.12, p.44115-44124

2024

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A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise

IEEE journal of solid-state circuits, 2022-09, Vol.57 (9), p.2802-2811

2022

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1200-V 5.2-m Omega center dot cm(2) 4H-SiC BJTs with a high common-emitter current gain

IEEE electron device letters, 2007-11, Vol.28 (11), p.1007

2007

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A 128-channel discrete cosine transform-based neural signal processor for implantable neural recording microsystems

International journal of circuit theory and applications, 2015-04, Vol.43 (4), p.489-501

2015

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A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD-SOI

IEEE transactions on circuits and systems. I, Regular papers, 2018-04, Vol.65 (4), p.1257-1268

2018

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A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3V 7T sense-amplifierless SRAM in 28 nm FD-SOI

ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 2016, p.429-432

2016

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14. Internationales Stuttgarter Symposium: Automobil- und Motorentechnik

2014., 2014

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A 0.5-V 25-MHz 1-mW 256-kb MTCMOS/SOI SRAM for solar-power-operated portable personal digital equipment - sure write operation by using step-down negatively overdriven bitline scheme

A 0.7 to 3 GHz wireless receiver front end in 65-nm CMOS with an LNA linearized by positive feedback

An 0.8-mm(2) 9.6-mW Iterative Decoder for Faster-Than-Nyquist and Orthogonal Signaling Multicarrier Systems in 65-nm CMOS

A 1-1 MASH 2-D vernier time-to-digital converter with 2nd-order noise shaping

A 1.2 volt 1.8GHz CMOS quadrature front-end

A 1.5 V 28 GHz Beam Steering SiGe PLL for an 81-86 GHz E-Band Transmitter

A 1.8 GHz CMOS VCO with reduced phase noise

1/f noise in Si and Si0.7Ge0.3 pMOSFETs

1/f-noise in vertical InAs nanowire transistors

1/f Noise Sources in Dual-Gated Indium Arsenide Nanowire Transistors

A 1 GHz CMOS current-folded direct digital RF quadrature modulator

A 10-bit 500-MS/s 124-mW Subranging Folding ADC in 0.13 μm CMOS

A 10-bit pipeline ADC using 40-dB opamps and calibrated customized references

A 10-Bit Split-Capacitor SAR ADC with DAC Imbalance Estimation and Calibration

A 10-bit wide-band CMOS direct digital RF amplitude modulator

A 10-mW mm-Wave Phase-Locked Loop With Improved Lock Time in 28-nm FD-SOI CMOS

An 11 GHz-Bandwidth Variable Gain Ka-Band Power Amplifier for 5G Applications

An 11mW continuous time delta-Sigma modulator with 20 MHz bandwidth in 65nm CMOS

A 12-bit High-Speed Time-Interleaved Pipelined Asynchronous Successive-Approximation ADC in 22-nm FDSOI CMOS

A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise

1200-V 5.2-m Omega center dot cm(2) 4H-SiC BJTs with a high common-emitter current gain

A 128-channel discrete cosine transform-based neural signal processor for implantable neural recording microsystems

A 128 kb 7T SRAM Using a Single-Cycle Boosting Mechanism in 28-nm FD-SOI

A 128 kb single-bitline 8.4 fJ/bit 90MHz at 0.3V 7T sense-amplifierless SRAM in 28 nm FD-SOI

14. Internationales Stuttgarter Symposium: Automobil- und Motorentechnik

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