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Photonic Interconnects for Computing Systems: Understanding and Pushing Design Challenges

1, 2017

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A novel optical network on chip design for future generation of multiprocessors system on chip

International journal of advanced computer science & applications, 2013-01, Vol.4 (3)

2013

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Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology

2011 Design, Automation & Test in Europe, 2011, p.1-6

2011

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Analysis of Energy-Delay-Product of a 3D Vertical Nanowire FET Technology

2021 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EuroSOI-ULIS), 2021, p.1-4

2021

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Performance and energy aware wavelength allocation on ring-based WDM 3D optical NoC

Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017, 2017, p.1372-1377

2017

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Ambipolar double-gate FET binary-decision- diagram (Am-BDD) for reconfigurable logic cells

2011 IEEE/ACM International Symposium on Nanoscale Architectures, 2011, p.162-168

2011

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A novel multilayer micro-ring resonator based optical network on chip

Optoelectronics and Advanced Materials Rapid Communications (Online), 2014-04, Vol.8 (3-4)

2014

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Introducing SPECS: scalable photonic event-driven circuit simulator

IET Conference Proceedings, 2023-11, Vol.2023 (34), p.1166-1169

2023

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Optimal two-stage designs for single-arm phase II oncology trials with two binary endpoints

Methods of information in medicine, 2011-01, Vol.50 (4), p.372-377

2011

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A system-level exploration flow for optical network on chip (ONoC) in 3D MPSoC

2010 IEEE International Symposium on Circuits and Systems (ISCAS), 2010, p.3613-3616

2010

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Layout guidelines for 3D architectures including Optical Ring Network-on-Chip (ORNoC)

2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip, 2011, p.242-247

2011

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Hardware/Software Exploration for an Anti-collision Radar System

2006 49th IEEE International Midwest Symposium on Circuits and Systems, 2006, Vol.1, p.385-389

2006

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Thermal-Aware Design Method for On-Chip Laser-based Optical Interconnect

Photonic Interconnects for Computing Systems, 2017, p.249-279

1, 2017

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Introduction

Photonic Interconnects for Computing Systems, 2017, p.1-8

1, 2017

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High performance 4:1 multiplexer with ambipolar double-gate FETs

2011 18th IEEE International Conference on Electronics, Circuits, and Systems, 2011, p.677-680

2011

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Fault-tolerant Photonic Network-on-Chip

Photonic Interconnects for Computing Systems, 2017, p.281-317

1, 2017

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Unified Inter- and Intra-chip Optical Interconnect Networks

Photonic Interconnects for Computing Systems, 2017, p.11-40

1, 2017

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Interconnects and Data System Throughput

Photonic Interconnects for Computing Systems, 2017, p.107-134

1, 2017

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Interconnect topology for cell matrices based on low-power nanoscale devices

2011 Faible Tension Faible Consommation (FTFC), 2011, p.99-102

2011

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Impact of Fabrication Non-Uniformity on Silicon Photonic Networks-on-Chip

Photonic Interconnects for Computing Systems, 2017, p.355-384

1, 2017

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Design Automation Beyond Its Electronic Roots: Toward a Synthesis Methodology for Wavelength-Routed Optical Networks-on-Chip

Photonic Interconnects for Computing Systems, 2017, p.137-169

1, 2017

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Thermal Management of Silicon Photonic NoCs in Many-core Systems

Photonic Interconnects for Computing Systems, 2017, p.227-248

1, 2017

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Design and Optimization of Vertical Interconnections for Multilayer Optical Networks-on-Chip

Design and Optimization of Vertical interconnections for Multilayer Optical Networks-on-Chip, 2017, p.41-72

1, 2017

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Techniques for Energy Proportionality in Optical Interconnects

Photonic Interconnects for Computing Systems, 2017, p.319-351

1, 2017

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Integrated Photonics for Chip-Multiprocessor Architectures

Photonic Interconnects for Computing Systems, 2017, p.191-223

1, 2017

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Photonic Interconnects for Computing Systems: Understanding and Pushing Design Challenges

A novel optical network on chip design for future generation of multiprocessors system on chip

Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology

Analysis of Energy-Delay-Product of a 3D Vertical Nanowire FET Technology

Performance and energy aware wavelength allocation on ring-based WDM 3D optical NoC

Ambipolar double-gate FET binary-decision- diagram (Am-BDD) for reconfigurable logic cells

A novel multilayer micro-ring resonator based optical network on chip

Introducing SPECS: scalable photonic event-driven circuit simulator

Optimal two-stage designs for single-arm phase II oncology trials with two binary endpoints

A system-level exploration flow for optical network on chip (ONoC) in 3D MPSoC

Layout guidelines for 3D architectures including Optical Ring Network-on-Chip (ORNoC)

Hardware/Software Exploration for an Anti-collision Radar System

Thermal-Aware Design Method for On-Chip Laser-based Optical Interconnect

Introduction

High performance 4:1 multiplexer with ambipolar double-gate FETs

Fault-tolerant Photonic Network-on-Chip

Unified Inter- and Intra-chip Optical Interconnect Networks

Interconnects and Data System Throughput

Interconnect topology for cell matrices based on low-power nanoscale devices

Impact of Fabrication Non-Uniformity on Silicon Photonic Networks-on-Chip

Design Automation Beyond Its Electronic Roots: Toward a Synthesis Methodology for Wavelength-Routed Optical Networks-on-Chip

Thermal Management of Silicon Photonic NoCs in Many-core Systems

Design and Optimization of Vertical Interconnections for Multilayer Optical Networks-on-Chip

Techniques for Energy Proportionality in Optical Interconnects

Integrated Photonics for Chip-Multiprocessor Architectures

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